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ISL71090SEHVF25 PDF预览

ISL71090SEHVF25

更新时间: 2024-02-07 04:39:31
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
10页 388K
描述
Radiation Hardened Ultra Low Noise, Precision Voltage Reference

ISL71090SEHVF25 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:DFP,Reach Compliance Code:compliant
ECCN代码:USML XV(E)HTS代码:8542.39.00.01
风险等级:5.81Is Samacsys:N
模拟集成电路 - 其他类型:THREE TERMINAL VOLTAGE REFERENCEJESD-30 代码:R-CDFP-F8
长度:6.485 mm功能数量:1
输出次数:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
最大输出电压:2.5012 V最小输出电压:2.4987 V
标称输出电压:2.5 V封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK座面最大高度:2.79 mm
最大供电电压 (Vsup):30 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR最大电压温度系数:10 ppm/ °C
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
总剂量:100k Rad(Si) V微调/可调输出:YES
宽度:6.475 mmBase Number Matches:1

ISL71090SEHVF25 数据手册

 浏览型号ISL71090SEHVF25的Datasheet PDF文件第4页浏览型号ISL71090SEHVF25的Datasheet PDF文件第5页浏览型号ISL71090SEHVF25的Datasheet PDF文件第6页浏览型号ISL71090SEHVF25的Datasheet PDF文件第7页浏览型号ISL71090SEHVF25的Datasheet PDF文件第8页浏览型号ISL71090SEHVF25的Datasheet PDF文件第9页 
ISL71090SEH25  
Package Outline Drawing  
K8.A  
8 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE  
Rev 3, 3/13  
PIN NO. 1  
ID OPTIONAL  
0.015 (0.38)  
0.008 (0.20)  
1
2
0.050 (1.27 BSC)  
0.005 (0.13)  
0.265 (6.73)  
0.245 (6.22)  
MIN  
4
PIN NO. 1  
ID AREA  
0.022 (0.56)  
0.015 (0.38)  
TOP VIEW  
0.110 (2.79)  
0.036 (0.92)  
0.026 (0.66)  
0.009 (0.23)  
0.004 (0.10)  
0.087 (2.21)  
6
0.265 (6.75)  
0.245 (6.22)  
-D-  
-H-  
-C-  
0.180 (4.57)  
0.170 (4.32)  
0.370 (9.40)  
0.325 (8.26)  
SEATING AND  
BASE PLANE  
0.03 (0.76) MIN  
SIDE VIEW  
NOTES:  
0.007 (0.18)  
0.004 (0.10)  
LEAD FINISH  
Index area: A notch or a pin one identification mark shall be located  
adjacent to pin one and shall be located within the shaded area shown.  
The manufacturer’s identification shall not be used as a pin one  
identification mark. Alternately, a tab may be used to identify pin one.  
1.  
0.009 (0.23)  
0.004 (0.10)  
BASE  
METAL  
2. If a pin one identification mark is used in addition to a tab, the limits  
of the tab dimension do not apply.  
0.019 (0.48)  
0.015 (0.38)  
3. The maximum limits of lead dimensions (section A-A) shall be  
measured at the centroid of the finished lead surfaces, when solder  
dip or tin plate lead finish is applied.  
0.0015 (0.04)  
MAX  
0.022 (0.56)  
0.015 (0.38)  
4. Measure dimension at all four corners.  
3
5. For bottom-brazed lead packages, no organic or polymeric materials  
shall be molded to the bottom of the package to cover the leads.  
SECTION A-A  
6. Dimension shall be measured at the point of exit (beyond the  
meniscus) of the lead from the body. Dimension minimum shall  
be reduced by 0.0015 inch (0.038mm) maximum when solder dip  
lead finish is applied.  
7. Dimensioning and tolerancing per ANSI Y14.5M - 1982.  
8. Controlling dimension: INCH.  
FN8451.0  
June 6, 2013  
10  

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