ISL6559
®
Data Sheet
December 29, 2004
FN9084.8
Multi-Phase PWM Controller
Features
• Multi-Phase Power Conversion
- 2, 3 or 4 Phase Operation
• Active Channel Current Balancing
The ISL6559 provides core-voltage regulation by driving 2 to
4 interleaved synchronous-rectified buck-converter channels
in parallel. Interleaving the channel timing results in
increased ripple frequency which reduces input and output
ripple currents. The reduction in ripple results in lower
component cost, reduced dissipation, and a smaller
implementation area.
• Precision r
Current Sharing
DS(ON)
- Lossless
- Low Cost
• Input Voltage: 12V or 5V Bias
• Precision CORE Voltage Regulation
The ISL6559 uses cost and space-saving r
sensing
DS(ON)
- ±1% System Accuracy Over Temperature
- Differential Remote Output Voltage Sensing
- Programmable Reference Offset
• Microprocessor Voltage Identification Input
- 5-Bit VID Input
for channel current balance, active voltage positioning, and
over-current protection. Output voltage is monitored by an
internal differential remote sense amplifier. A high-bandwidth
error amplifier drives the output voltage to match the
programmed 5-bit DAC reference voltage. The resulting
compensation signal guides the creation of pulse width
modulated (PWM) signals to control companion Intersil
MOSFET drivers. The OFS pin allows direct offset of the
DAC voltage from 0V to 50mV using a single external
resistor. The entire system is trimmed to ensure a system
accuracy of ±1% over temperature.
- 0.800V to 1.550V in 25mV Steps
- Dynamic VID Technology
• Programmable Droop Voltage
• Fast Transient Recovery Time
• Over Current Protection
• Digital Soft Start
• Threshold Sensitive Enable Input
• High Ripple Frequency (160kHz to 4MHz)
Outstanding features of this controller IC include
Dynamic VIDTM technology allowing seamless on-the-fly VID
changing without the need of any external components.
Output voltage “droop” or active voltage positioning is
optional. When employed, it allows the reduction in size and
cost of the output capacitors required to support load
transients. A threshold-sensitive enable input allows the use
of an external resistor divider for start-up coordination with
Intersil MOSFET drivers or any other devices powered from
a separate supply.
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves PCB
efficiency and has a thinner profile
• Pb-Free Available (RoHS Compliant)
Applications
• AMD Hammer Family Processor Voltage Regulator
• Low Output Voltage, High Current DC-DC Converters
• Voltage Regulator Modules
Superior over-voltage protection is achieved by gating on the
lower MOSFET of all phases to crowbar the output voltage.
An optional second crowbar on V , formed with an external
IN
MOSFET or SCR gated by the OVP pin, is triggered when
an over-voltage condition is detected. Under-voltage
conditions are detected, but PWM operation is not disrupted.
Over-current conditions cause a hiccup-mode response as
the controller repeatedly tries to restart. After a set number
of failed startup attempts, the controller latches off. A power
good logic signal indicates when the converter output is
between the UV and OV thresholds.
Pinouts
ISL6559CB (28 LEAD SOIC)
ISL6559CR (32 LEAD QFN)
TOP VIEW
TOP VIEW
GND
OVP
1
2
3
4
5
6
7
8
9
28 EN
27 FS/DIS
26 PGOOD
25 PWM4
24 ISEN4
23 ISEN1
22 PWM1
21 PWM2
20 GND
VID4
VID3
VID2
VID1
VID0
OFS
32 31 30 29 28 27 26 25
VID2
VID1
VID0
NC
1
2
3
4
5
6
7
8
24 PWM4
23 ISEN4
22 ISEN1
21 PWM1
20 PWM2
19 GND
OFS
COMP
COMP
FB
FB 10
IOUT 11
VDIFF 12
VSEN 13
RGND 14
19 ISEN2
18 ISEN3
17 PWM3
16 VCC
18 ISEN2
17 ISEN3
NC
9
10 11 12 13 14 15 16
NC = NO CONNECT
15 GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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