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ISL6455IRZ-T5K

更新时间： 2024-11-25 21:02:55
品牌 Logo 应用领域
瑞萨 - RENESAS 开关
页数 文件大小 规格书
13页 591K
描述
1.3 A SWITCHING REGULATOR, 880 kHz SWITCHING FREQ-MAX, PQCC24, 4 X 4 MM, ROHS COMPLIANT, PLASTIC, MO-220VGGD-2, QFN-24

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ISL6455IRZ-T5K 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC24,.16SQ,20针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.67
模拟集成电路 - 其他类型：SWITCHING REGULATOR控制模式：CURRENT-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：3.6 V
最小输入电压：3 V标称输入电压：3.3 V
JESD-30 代码：S-PQCC-N24JESD-609代码：e3
长度：4 mm湿度敏感等级：2
功能数量：1端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
最大输出电流：1.3 A封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC24,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1 mm子类别：Switching Regulator or Controllers
表面贴装：YES切换器配置：BUCK
最大切换频率：880 kHz技术：MOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4 mmBase Number Matches：1

ISL6455IRZ-T5K 数据手册

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OBSOLETE PRODUCT  
DATASHEET  
NO RECOMMENDED REPLACEMENT  
contact our Technical Support Center at  
1-888-INTERSIL or www.intersil.com/tsc  
ISL6455, ISL6455A  
Triple Output Regulator with Single Synchronous Buck and Dual LDO  
FN9196  
Rev 1.00  
Feb 19, 2014  
The ISL6455 is a highly integrated triple output regulator  
which provides a single chip solution for FPGAs and wireless  
Features  
• Fully integrated synchronous buck regulator + dual LDO  
chipset power management. The device integrates an  
adjustable high efficiency synchronous buck regulator with  
two adjustable ultra low noise LDO regulators. Either the  
ISL6455 or ISL6455A can be selected based on whether  
3.3V ±10% or 5V ±10% is required as an input voltage.  
• PWM output voltage adjustable.  
- 0.8V to 2.5V with ISL6455 (VIN = 3.3V)  
- 0.8V to 3.3V with ISL6455A (VIN = 5.0V)  
• High output current. . . . . . . . . . . . . . . . . . . . . . . . . 600mA  
The synchronous current mode control PWM regulator with  
integrated N- Channel and P-Channel power MOSFET  
provides adjustable voltages based on external resistor  
setting. Synchronous rectification with internal MOSFETs is  
used to achieve higher efficiency and reduced number of  
external components. Operating frequency is typically  
750kHz, allowing the use of smaller inductor and capacitor  
values. The device can be synchronized to an external clock  
signal in the range of 500kHz to 1MHz. The PG_PWM  
output indicates loss of regulation on PWM output.  
• Dual LDO adjustable options  
- LDO1, 1.2V to Vin - 0.3V (3.3Vmax). . . . . . . . . . 300mA  
- LDO2, 1.2V to Vin - 0.3V (3.3Vmax). . . . . . . . . . 300mA  
• Ultra-compact DC/DC converter design  
• Stable with small ceramic output capacitors and no load  
• High conversion efficiency  
• Low shutdown supply current  
• Low dropout voltage for LDOs  
- LDO1 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA  
- LDO2 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA  
The ISL6455 also has two LDO adjustable regulators using  
internal PMOS transistors as pass devices. LDO2 features  
ultra low noise typically below 30µV  
to aid VCO stability.  
• Low output voltage noise  
RMS  
The EN_LDO pin controls LDO1 and LDO2 outputs. The  
ISL6455 also integrates a RESET function, which eliminates  
the need for additional RESET IC required in WLAN and  
other applications. The IC asserts a RESET signal whenever  
- <30µV  
(typical) for LDO2 (VCO supply)  
RMS  
• PG_LDO and PG_PWM (PWM and LDO) outputs  
• Extensive circuit protection and monitoring features  
- PWM overvoltage protection  
- Overcurrent protection  
the V supply voltage drops below a preset threshold,  
IN  
keeping it asserted for at least 25ms after V has risen  
IN  
above the reset threshold. The PG_LDO output indicates  
loss of regulation on either of the two LDO outputs. Other  
features include overcurrent protection and thermal  
shutdown for all of the three outputs. High integration and  
the thin Quad Flat No-lead (QFN) package makes ISL6455  
an ideal choice for powering FPGAs and small form factor  
wireless cards such as PCMCIA, mini-PCI and Cardbus-32.  
- Shutdown  
- Thermal shutdown  
• Integrated RESET output for microprocessor reset  
• Proven reference design for total WLAN system solution  
• QFN package  
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat  
No Leads - Product Outline  
Ordering Information  
- Near Chip-Scale package footprint Improves PCB  
efficiency and is thinner in Profile  
PART NUMBER*  
(Note)  
PART  
TEMP.  
PACKAGE  
PKG.  
MARKING RANGE (°C) (Pb-Free) DWG. #  
• Pb-free (RoHS compliant)  
ISL6455IRZ  
64 55IRZ -40 to +85 24 Ld QFN L24.4x4B  
64 55AIRZ -40 to +85 24 Ld QFN L24.4x4B  
Applications  
ISL6455AIRZ  
Add “-TK” or T5K suffix for tape and reel. Please refer to TB347 for  
details on reel specifications.  
• WLAN cards  
- PCMCIA, Cardbus32, MiniPCI cards  
- Compact flash cards  
NOTE: These Intersil Pb-free plastic packaged products employ  
special Pb-free material sets; molding compounds/die attach  
materials and 100% matte tin plate PLUS ANNEAL - e3 termination  
finish, which is RoHS compliant and compatible with both SnPb and  
Pb-free soldering operations. Intersil Pb-free products are MSL  
classified at Pb-free peak reflow temperatures that meet or exceed the  
Pb-free requirements of IPC/JEDEC J STD-020.  
• Hand-held instruments  
Related Literature  
• TB363 - Guidelines for Handling and Processing Moisture  
Sensitive Surface Mount Devices (SMDs)  
• TB389 - PCB Land Pattern Design and Surface Mount  
Guidelines for QFN Packages  
FN9196 Rev 1.00  
Feb 19, 2014  
Page 1 of 13  
1234567...13

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