Multiphase PWM Regulator for VR12™ Desktop CPUs
ISL6363
Features
Fully compliant with VR12™ specifications, the ISL6363
provides a complete solution for microprocessor core and
graphics power supplies. It provides two Voltage Regulators
(VRs) with three integrated gate drivers. The first output (VR1)
can be configured as a 4, 3, 2 or 1-phase VR while the second
output (VR2) is a 1-phase VR. The two VRs share a serial control
bus to communicate with the CPU and achieve lower cost and
smaller board area compared with a two-chip approach.
• Serial Data Bus (SVID)
• Dual Outputs:
- Configurable 4, 3, 2 or 1-phase for the 1st Output with 2
Integrated Gate Drivers
- 1-phase for the 2nd Output with Integrated Gate Driver
• Precision Core Voltage Regulation
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
Based on Intersil’s Robust Ripple Regulator R3 Technology™,
the PWM modulator, compared to traditional modulators, has
faster transient settling time, variable switching frequency
during load transients and has improved light load efficiency
with its ability to automatically change switching frequency.
• PS2 Compensation and High Frequency Load Transient
Compensation
• Differential Remote Voltage Sensing
• Lossless Inductor DCR Current Sensing
The ISL6363 has several other key features. Both outputs
support DCR current sensing with a single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs come with remote voltage sensing,
• Programmable V
BOOT
Voltage at Start-up
• Resistor Programmable Address, IMAX, TMAX for Both
Outputs
programmable V
voltage, serial bus address, IMAX, TMAX,
BOOT
• Adaptive Body Diode Conduction Time Reduction
adjustable switching frequency, OC protection and separate
power-good indicators. To reduce output capacitors, the
ISL6363 also has an additional compensation function for
PS1/2 mode and high frequency load transient compensation.
Applications
• VR12 Desktop Computers
Related Literature
• ISL6363EVAL1Z User Guide
1.15
1.10
1.7mΩ LOADLINE
V
CORE
50mV/DIV
1.05
1.1V - PS1
1.00
1.1V - PS0
0.95
0.90
COMP
1V/DIV
65A STEP LOAD
1V/DIV
0
5
10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85
(A)
2µs/DIV
I
OUT
FIGURE 2. ACCURATE LOADLINE, V
vs I
OUT
FIGURE 1. FAST TRANSIENT RESPONSE
CORE
September 29, 2011
FN6898.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and R3 Technology are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1