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ISL54226IRTZ-T7A PDF预览

ISL54226IRTZ-T7A

更新时间: 2024-01-04 18:08:23
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管输出元件
页数 文件大小 规格书
17页 1054K
描述
High-Speed USB 2.0 (480Mbps) DPST Switch with Overvoltage Protection (OVP) and Dedicated Charger Port Detection

ISL54226IRTZ-T7A 技术参数

生命周期:Unknown零件包装代码:DFN
包装说明:HVSON, SOLCC8,.08,20针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
模拟集成电路 - 其他类型:DPSTJESD-30 代码:S-PDSO-N8
JESD-609代码:e3长度:2 mm
湿度敏感等级:1正常位置:NO
信道数量:2功能数量:1
端子数量:8通态电阻匹配规范:0.45 Ω
最大通态电阻 (Ron):5 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.08,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:0.8 mm子类别:Multiplexer or Switches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
最长断开时间:60 ns最长接通时间:160 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:2 mmBase Number Matches:1

ISL54226IRTZ-T7A 数据手册

 浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第1页浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第3页浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第4页浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第5页浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第6页浏览型号ISL54226IRTZ-T7A的Datasheet PDF文件第7页 
ISL54226  
Pin Configurations  
ISL54226  
(8 LD 1.2x1.4 µTQFN)  
TOP VIEW  
ISL54226  
(8 LD 2x2 TDFN)  
TOP VIEW  
PD  
INT  
1
2
3
4
8
7
6
5
VDD  
LOGIC  
OE/ALM  
D-  
D+  
OVP  
4MΩ  
COM+  
D-  
1
D+  
OVP  
GND  
COM-  
LOGIC  
4MΩ  
NOTE:  
1. Switches Shown for OE/ALM = Logic “0”.  
Pin Descriptions  
Truth Table  
PIN  
INPUT  
OUTPUT  
µTQFN  
TDFN  
NAME  
DESCRIPTION  
Charger Mode Interrupt Output  
USB Data Port  
SIGNAL AT COM  
4
5
6
7
8
1
2
1
2
3
4
5
6
7
INT  
PINS  
OE/ALM  
D-, D+  
OFF  
ON  
INT  
OE/ALM  
Low  
STATE  
Normal  
Normal  
OVP  
D+  
0V to 3.6V  
0V to 3.6V  
0
1
0
High  
High  
High  
COM+ USB Data Port  
High  
GND  
Ground Connection  
Overvoltage  
Range  
OFF  
Low  
COM- USB Data Port  
Overvoltage  
Range  
1
0
1
OFF  
OFF  
ON  
High  
Low  
High  
Low  
Low  
High  
OVP  
D-  
USB Data Port  
OE/ALM Switch Enable/Alarm (Open Drain)  
Drive Low to Open Switches  
COM Pins Tied  
Together  
Charger  
Port (CP)  
Outputs are Low when OVP is Activated  
COM Pins Tied  
Together  
Normal  
3
-
8
VDD  
PD  
Power Supply  
PD  
Thermal Pad. Tie to Ground or Float  
Logic “0” when 0.5V, Logic “1” when 1.4V with a 2.7V to 3.6V Supply.  
TABLE 1. OVP TRIP POINT VOLTAGE  
SYSTEM VOLTAGE CONDITIONS  
TRIP POINT  
CODEC SUPPLY  
2.7V to 3.3V  
2.7V to 3.3V  
SWITCH SUPPLY (V  
2.7V to 5.25V  
)
COMs SHORTED TO  
PROTECTED  
Yes  
MIN  
3.62V  
-0.6V  
MAX  
3.95V  
-0.29V  
DD  
VBUS  
-5V  
2.7V to 5.25V  
Yes  
FN7614 Rev 2.00  
Aug 15, 2016  
Page 2 of 17  

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