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ISL45042IRZ-TK PDF预览

ISL45042IRZ-TK

更新时间： 2024-01-31 23:35:18
品牌 Logo 应用领域
英特矽尔 - INTERSIL 商用集成电路光电二极管
页数 文件大小 规格书
8页 130K
描述
LCD Module Calibrator

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ISL45042IRZ-TK 技术参数

生命周期：Unknown零件包装代码：DFN
包装说明：VSON,针数：8
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.03
其他特性：ALSO REQUIRES 4.5V TO 20V SUPPLY商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PDSO-N8JESD-609代码：e3
长度：3 mm湿度敏感等级：2
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装形状：SQUARE封装形式：SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：0.75 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn) - annealed
端子形式：NO LEAD端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：3 mmBase Number Matches：1

ISL45042IRZ-TK 数据手册

 浏览型号ISL45042IRZ-TK的Datasheet PDF文件第1页浏览型号ISL45042IRZ-TK的Datasheet PDF文件第2页浏览型号ISL45042IRZ-TK的Datasheet PDF文件第3页浏览型号ISL45042IRZ-TK的Datasheet PDF文件第5页浏览型号ISL45042IRZ-TK的Datasheet PDF文件第6页浏览型号ISL45042IRZ-TK的Datasheet PDF文件第7页 
ISL45042  
Electrical Specifications Test Conditions: VDD = 3V, AVDD = 10V, OUT = 5V, R  
= 24.9kΩ; Unless Otherwise Specified.  
SET  
Typicals are at T = +25°C (Continued)  
A
TEMP  
PARAMETER  
Programming Time  
SYMBOL  
TEST CONDITIONS  
(°C)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
MIN  
TYP  
MAX  
100  
7
UNITS  
ms  
P
T
SET Voltage Resolution  
SET Differential Nonlinearity  
SET Zero-Scale Error  
SET Full-Scale Error  
SET Current  
SET  
SET  
(Note 4)  
7
7
Bits  
LSB  
LSB  
LSB  
μA  
VR  
DN  
Monotonic Over Temperature  
-
-
±1  
±2  
±8  
-
SET  
-
-
ZSE  
FSE  
SET  
-
-
20  
-
ISET  
SET  
Through R  
SET  
(Note 7)  
-
10  
2.25  
-
SET External Resistance  
To GND, AVDD = 20V  
To GND, AVDD = 4.5V  
200  
45  
-
kΩ  
ER  
-
kΩ  
AVDD to SET Voltage Attenuation  
OUT Settling Time  
AVDD to SET  
1:20  
20  
-
V/V  
μs  
OUT  
to ±0.5 LSB Error Band (Note 5)  
-
-
ST  
OUT Voltage Range  
V
VSET +  
0.5V  
13  
V
OUT  
OUT Voltage Drift  
NOTES:  
OUT  
(Note 5)  
25 to 55  
-
<10  
-
mV  
VD  
2. CTL signal only needs to be greater than 4.9V to program EEPROM.  
3. Tested at AVDD = 20V.  
4. The Counter value is set to mid-scale ±4 LSB’s in the Production.  
5. Simulated and Determined via Design and NOT Directly Tested.  
6. Simulated Maximum Current Draw when Programming EEPROM is 23mA, should be considered when designing Power Supply.  
7. A Typical Current of 20μA is Calculated using the AVDD = 10V and RSET = 24.9kΩ. The maximum suggested SET Current should be 120μA.  
Application Information  
AVDD  
AVDD  
R
The application circuit to adjust the VCOM voltage in an LCD  
panel is shown in Figure 1. The ISL45042 has a 128-step  
sink current resolution. The output is connected to an  
external voltage divider, that results in decreasing the output  
VCOM voltage as you increase the ISL45042 sink current.  
ISL45042  
CTL  
I
Sink  
1
CE  
OUT  
SET  
R
2
R
SET  
CTL Pin  
VCOM  
The adjustment of the output VCOM voltage and the  
programming of the non-volatile memory are provided  
through a single pin called CTL, when the CE pin is high.  
+
-
The output VCOM voltage is increased with a mid (Vdd/2) to  
high transition (0.8*VDD) on CTL pin. The output VCOM  
voltage is decreased with a mid (Vdd/2) to low transition  
(0.3*VDD), on CTL pin (Reference Figure 6). Once the  
minimum or maximum value is reached on the 128 steps,  
the device will not overflow or underflow beyond that  
minimum or maximum value.  
COLUMN  
DRIVER  
Programming of the non-volatile memory occurs when the  
CTL pin exceeds 4.9V. The CTL signal needs to remain  
above 4.9V for more than 200µs. The level and timing  
needed to program the non-volatile memory is given in  
Figure 2. It then takes a maximum of 100ms for the  
programming to be completed inside the device.  
SINGLE PIXEL  
IN LCD PANEL  
FIGURE 1. VCOM ADJUSTMENT IN AN LCD PANEL  
FN6072.6  
November 14, 2006  
4
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