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ISL45021IU01 PDF预览

ISL45021IU01

更新时间： 2024-02-24 18:35:20
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器电阻器
页数 文件大小 规格书
18页 339K
描述
10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 256 POSITIONS, PDIP8, 0.300 INCH, PLASTIC, DIP-8

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ISL45021IU01 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：0.300 INCH, PLASTIC, DIP-8
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92标称带宽：1.5 kHz
控制接口：INCREMENT/DECREMENT转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：R-PDIP-T8JESD-609代码：e0
长度：9.585 mm功能数量：1
位置数：256端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：5 V最小电阻器端电压：
座面最大高度：5.33 mm标称供电电压：5 V
表面贴装：NO标称温度系数：200 ppm/ °C
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
标称总电阻：10000 Ω宽度：7.62 mm
Base Number Matches：1

ISL45021IU01 数据手册

 浏览型号ISL45021IU01的Datasheet PDF文件第3页浏览型号ISL45021IU01的Datasheet PDF文件第4页浏览型号ISL45021IU01的Datasheet PDF文件第5页浏览型号ISL45021IU01的Datasheet PDF文件第7页浏览型号ISL45021IU01的Datasheet PDF文件第8页浏览型号ISL45021IU01的Datasheet PDF文件第9页 
ISL45021  
Programming Modes  
Flow Control  
Two program modes are available for the ISL45021:  
Reading and writing to NVMEM requires an internal access  
cycle to complete before the next command can be sent.  
Direct program mode. The tap register setting can be  
changed either by loading a predetermined value from an  
external microcontroller or by using the UP/DOWN  
command. The UP and DOWN commands change the tap  
register setting incrementally i.e., 1 LSB at a time. The UP  
and DOWN commands will not wrap around at the ends of  
the scale.  
• Read Tap Register (#2)  
• Read NVMEM (#4)  
• Program NVMEM (#5)  
• Load Tap Register (#6)  
• Program NVMEM with Tap Register (#7)  
Dais y Chain  
NVMEM restore mode. One of the previously stored  
settings can be loaded into the TR register from the non-  
volatile memory. Four 9-bit non-volatile memories, are  
available for to store the tap register settings. The first  
register, NVMEM0, stores the favorite or default tap register  
setting that will be loaded into the tap register at system  
power up or software power on reset operation.  
Multiple devices can be controlled by the same bus without  
the need for extra CS lines from the microcontroller by daisy  
chaining the devices with the SDO of the first device  
connected to SDI of the next device as shown in Figure 3  
when using the 10-pin package.  
A complete command is 24 bits including the instruction and  
the two data bytes. When shifting 24 bits in to the first device  
in the chain, the 24 bits of the previous command will be  
shifted out. So to set up two devices in a daisy chain, a total  
of 48 bits must be sent where the first 24 bits will be shifted  
out to the second device and the 24 bits shifted in last will  
remain in the first device.  
Non-Volatile Memory (NVMEM)  
The ISL45021 has four NVMEM positions available for  
storing the output buffer operating mode and the  
potentiometer setting. These NVMEM positions can be  
directly written through the SPI using a write command (#5)  
with address and data bytes. Another command (#7) is  
available that stores the current output buffer operating  
mode and potentiometer settings into the selected NVMEM  
position. Bit A3 and A2 in the instruction byte decide which  
NVMEM position is used. (See Table 4).  
1. Command and data for device 2 is shifted into device 1,  
this will propagate to Device 2 when the next 24 bits are  
shifted in.  
DEVICE 1  
COMMAND 1 DATA 2 A DATA 2 B  
The potentiometer is loaded with the value stored in the  
NVMEM position 0 on power up.  
DEVICE 2  
XX  
XX  
XX  
WRITE PROTECT OF NVMEM  
Write-Protect (WP) disables any changes of current content  
in the NVMEM regardless of the commands, except that  
NVMEM setting can be retrieved using commands 4, 6 of  
Table 4. Therefore, Write-Protect (WP) pin provides  
hardware NVMEM protection feature with WP tied to Vss.  
WP, which is active at logic LOW, should be tied directly to  
2. Command and data for device 1 is shifted into device 1.  
Now Device 1 and 2 are correctly set up. 10-pin TSSOP  
package only.  
DEVICE 1  
COMMAND 2 DATA 1 A DATA 1 B  
DEVICE 2  
V
if it is not being used. This function is only available on  
DD  
the 10-pin package.  
COMMAND 1 DATA 2 A DATA 2 B  
FIGURE 2.  
V
DD  
CS  
CLK  
MICRO  
CONTROLLER  
SDO  
CS  
CS  
CS  
CLK  
CLK  
CLK  
SDI  
SDO  
SDI  
SDO  
SDI  
SDO  
DEVICE 1  
DEVICE 2  
DEVICE N  
FIGURE 3. DAISY CHAIN CONFIGURATION (10 PIN TSSOP PACKAGE ONLY)  
6
1...3456789...18

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