Datasheet > ISL45024IP10

ISL45024IP10

更新时间： 2024-01-25 19:02:12

品牌	Logo	应用领域
瑞萨 - RENESAS		光电二极管转换器电阻器
页数	文件大小	规格书
17页	358K
描述
QUAD 100K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 256 POSITIONS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

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ISL45024IP10 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP,
针数：	20	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.92	标称带宽：	0.2 kHz
控制接口：	INCREMENT/DECREMENT	转换器类型：	DIGITAL POTENTIOMETER
JESD-30 代码：	R-PDIP-T20	JESD-609代码：	e0
长度：	25.895 mm	功能数量：	4
位置数：	256	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
电阻定律：	LINEAR	最大电阻容差：	20%
最大电阻器端电压：	5 V	最小电阻器端电压：
座面最大高度：	5.33 mm	标称供电电压：	5 V
表面贴装：	NO	标称温度系数：	200 ppm/ °C
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
标称总电阻：	100000 Ω	宽度：	7.62 mm
Base Number Matches：	1

ISL45024IP10 数据手册

ISL45024

Data Sheet

March 2004

FN6070.1

256-Tap Quad-Channel Non-Volatile

Digital Potentiometer

Features

• 256 taps for each potentiometer

The iPot™ ISL45024 DCP is a 256-tap,

quad-channel non-volatile digital

potentiometer available in 10kΩ, 50kΩ and

• Four independent, linear-taper channels in one package

• End-to-end resistance available in 10kΩ, 50kΩ and 100kΩ

• Selectable output buffer for each channel

100kΩ end-to-end resistances. These devices can be used

as a three-terminal potentiometer or as a two terminal

variable resistor in a wide variety of applications.

• SPI Serial Interface for data transfer and potentiometer

control

The output of each potentiometer is determined by the wiper

position, which varies linearly between VA and VB terminal

according to the content stored in the volatile Tap Register

(TR). The settings of the TR can be provided either directly

by the user through the industry standard SPI interface, or

by the non-volatile memory (NVMEM0~3) where the

previous settings are stored. When changes are made to the

TR to establish a new wiper position, the value of the setting

can be saved into any non-volatile memory location

(NVMEM0~3) by executing a NVMEM save operation. Each

channel has its own four non-volatile memory locations

(NVMEM0~3) that can be directly written to, and read by,

users through the SPI interface. Upon powerup the content

of the NVMEM0 is automatically loaded to the Tap Register.

• Daisy-chain operation for multiple devices

• Nonvolatile storage of four wiper positions per channel

with power-on recall from NVMEM0

• Low standby current (1µA Max. with output buffer inactive)

• Endurance 100K typical stores per bit

• Register Data Retention 100 years

• Industrial temperature range: -40°C ~ 85°C

• Wide operating voltage range: 2.7V ~ 5.5V

• Package option:

- 20-pin TSSOP, 20-pin SOIC, 20-pin PDIP

The ISL45024 contains four independent channels in 20-pin

PDIP, SOIC and TSSOP packages and can operate over a

wide operating voltage range from 2.7V to 5.5V. A selectable

output buffer is built-in for each channel for those

applications where an output buffer is required.

Ordering Information

OUTPUT

BUFFER

END-TO-END

RESISTANCE

TSSOP

SOIC

PDIP

TEMP. RANGE (°C)

-40 to 85

Yes

10K

50K

ISL45024IV01

ISL45024IV05

ISL45024IV10

ISL45024IB01

ISL45024IB05

ISL45024IB10

ISL45024IP01

ISL45024IP05

ISL45024IP10

-40 to 85

100K

-40 to 85

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...17

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