®
IS62LV5128L
IS62LV5128LL
512K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
ISSI
MAY 2000
FEATURES
DESCRIPTION
• Access times of 70, 85 and 100 ns
The ISSI IS62LV5128L and IS62LV5128LL is a low
• CMOS low power operation:
— 120 mW (typical) operating
— 6 µW (typical) standby
voltage, 524,288 words by 8 bits, CMOS SRAM. It is
fabricated using ISSI’s low voltage, six transistor (6T),
CMOS technology. The device is targeted to satisfy the
demands of the state-of-the-art technologies such as
cell phones and pagers.
• Low data retention voltage: 2V (min.)
• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications
When CE is HIGH (deselected), the device assumes a
standbymodeatwhichthepowerdissipationcanbereduced
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs, CE and OE. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
• TTL compatible inputs and outputs
• Fully static operation:
— No clock or refresh required
• Single 2.5V to 3.3V power supply
• Available in 36-pin mini BGA
The IS62LV5128L and IS62LV5128LL are available in a
36-pin mini BGA package.
FUNCTIONAL BLOCK DIAGRAM
512K x 8
MEMORY ARRAY
A0-A18
DECODER
VCC
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CE
CONTROL
CIRCUIT
OE
WE
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev. A
06/01/00