( ) & (PbF)
S
IR2125
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Logic Supply Voltage
Min.
Max.
Units
V
B
-0.3
525
V
S
V
B
- 25
V
+ 0.3
+ 0.3
25
B
V
HO
V
S
- 0.3
V
B
V
CC
-0.3
V
V
Logic Input Voltage
-0.3
-0.3
V
V
+ 0.3
IN
CC
V
ERR
Error Signal Voltage
+ 0.3
CC
V
Current Sense Voltage
V
S
- 0.3
V
B
+ 0.3
50
CS
dV /dt
s
Allowable Offset Supply Voltage Transient
—
—
—
—
—
—
-55
—
V/ns
W
P
D
Package Power Dissipation @ T ≤ +25°C (8 lead PDIP)
A
1.0
1.25
125
100
150
150
300
(16 lead SOIC)
Thermal Resistance, Junction to Ambient (8 lead PDIP)
(16lLead SOIC)
Rth
JA
°C/W
T
J
Junction Temperature
T
S
Storage Temperature
°C
T
L
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.
S
Symbol
Definition
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Logic Supply Voltage
Min.
Max.
Units
V
B
V
S
+ 12
V + 18
S
V
S
Note 1
500
V
HO
V
S
V
B
V
V
CC
0
0
0
18
V
IN
Logic Input Voltage
V
CC
V
ERR
Error Signal Voltage
V
CC
V
Current Sense Signal Voltage
Ambient Temperature
V
S
V
B
CS
T
A
-40
125
°C
Note 1: Logic operational for V of -5 to +500V. Logic state held for V of -5V to -V . (Please refer to the Design Tip
S S BS
DT97-3 for more details).
2
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