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IMP8980DP/T PDF预览

IMP8980DP/T

更新时间: 2024-01-30 11:15:27
品牌 Logo 应用领域
IMP 开关PC
页数 文件大小 规格书
14页 137K
描述
PCM Digital Switch

IMP8980DP/T 技术参数

生命周期:Obsolete零件包装代码:LCC
包装说明:,针数:44
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.29JESD-30 代码:S-PQCC-J44
端子数量:44封装主体材料:PLASTIC/EPOXY
封装形状:SQUARE封装形式:CHIP CARRIER
认证状态:Not Qualified表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH端子形式:J BEND
端子位置:QUAD

IMP8980DP/T 数据手册

 浏览型号IMP8980DP/T的Datasheet PDF文件第1页浏览型号IMP8980DP/T的Datasheet PDF文件第2页浏览型号IMP8980DP/T的Datasheet PDF文件第4页浏览型号IMP8980DP/T的Datasheet PDF文件第5页浏览型号IMP8980DP/T的Datasheet PDF文件第6页浏览型号IMP8980DP/T的Datasheet PDF文件第7页 
stream into active Message Mode; i.e., the  
contents of the Connection Memory Low  
are output on the ST-BUS output streams  
once every frame unless the ODE pin is  
low. In this mode the chip behaves as if  
bits 2 and 0 of every Connection Memory  
High location were 1, regardless of the  
actual values.  
High location function normally (see  
Figure 5). If bit 2 is 1, the associated ST-  
BUS output channel is in Message Mode;  
i.e., the byte in the corresponding Connec-  
tion Memory Low location is transmitted  
on the stream at that channel. Otherwise,  
one of the bytes received on the serial  
inputs is transmitted and the contents of  
the Connection Memory Low define the  
ST-BUS input stream and channel where  
the byte is to be found (see Figure 6).  
If bit 6 of the Control Register is 0, then  
bits 2 and 0 of each Connection Memory  
Figure 3- Address Memory Map  
A5 A4  
A3  
X
0
A2 A1  
A0 HEX ADDRESS  
LOCATION  
0
1
1
1
X
0
0
1
X
0
0
1
X
0
0
1
X
0
1
1
00-1F  
20  
21  
Control Register*  
Channel 0†  
0
Channel 1†  
1
3F  
Channel 31†  
* Writing to the Control Register is the only fast transaction.  
† Memory and stream are specified by the contents of the Control Register.  
Figure 4 - Control Register Bits  
Mode  
Control  
Bits  
Stream  
Address  
Bits  
Memory  
Select  
Bits  
(Unused)  
7
6
5
4
3
2
1
0
BIT  
NAME  
DESCRIPTION  
7
Split  
When 1, all subsequent reads are from the Data Memory  
and writes are to the Connection Memory Low, except when  
the Control Register is accessed again. When 0, the Memory  
Select bits specify the memory for subsequent operations. In  
either case, the Stream Address Bits select the subsection of  
the memory which is made available.  
Memory  
6
Message  
Mode  
When 1, the contents of the Connection Memory Low are output  
on the Serial Output streams except when the ODE pin is low.  
When 0, the Connection Memory bits for each channel determine  
what is output.  
5
(unused)  
Memory  
4-3  
0-0 - Not to be used  
Select Bits  
0-1 - Data Memory (read only from the microprocessor port)  
1-0 - Connection Memory Low  
1-1 - Connection Memory High  
2-0  
Stream  
Address  
Bits  
The number expressed in binary notation on these bits refers to  
the input or output ST-BUS stream which corresponds to the  
subsection of memory made accessible for subsequent operations.  
3

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