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IMISG536AXB PDF预览

IMISG536AXB

更新时间: 2024-02-11 12:17:25
品牌 Logo 应用领域
其他 - ETC 时钟发生器光电二极管
页数 文件大小 规格书
6页 56K
描述
Miscellaneous Clock Generator

IMISG536AXB 技术参数

是否Rohs认证: 不符合生命周期:Active
Reach Compliance Code:compliant风险等级:5.88
Is Samacsys:NJESD-30 代码:R-PDSO-G16
JESD-609代码:e0端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:3.3/5 V
认证状态:Not Qualified子类别:Clock Generators
最大压摆率:40 mA表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

IMISG536AXB 数据手册

 浏览型号IMISG536AXB的Datasheet PDF文件第1页浏览型号IMISG536AXB的Datasheet PDF文件第3页浏览型号IMISG536AXB的Datasheet PDF文件第4页浏览型号IMISG536AXB的Datasheet PDF文件第5页浏览型号IMISG536AXB的Datasheet PDF文件第6页 
SG536  
Low EMI Clock Generator for Multi-Function Products  
Approved Product  
PIN DESCRIPTION  
OSCin, OSCout  
- These pins form an on-chip reference oscillator when connected to terminals of an external parallel  
resonant crystal. OSCin may also serve as an input for an externally generated CMOS level or AC coupled reference  
signal.  
CPUsel(0:1)  
- Input controls pins used to select the clock frequency of the CPUclk output. See table page 1. These  
pins have internal pull-ups.  
MODsel -  
This pin is used to control the Spectrum Spread enable/disable. When Low, Spectrum Spread is not applied  
to the CPUclk output. When High (default), this pin enables the CPUclk to be modulated at +/-1.25 % of its center  
frequency as described in figure 2, Page 4 and reduces EMI as described in figure 1. It has an internal pull-up.  
CPUclk  
- SSCG modulated clock output for system CPU. Frequency may be selected based on the table on page 1.  
SCNclk -  
Non-modulated clock output for system scanner processing. It is centered exactly at 40.00000 MHz.  
- Non-modulated clock output for system engine logic. It is centered exactly at 60.00000 MHz.  
- Circuit positive power supply.  
VIDclk  
VDD  
VSS  
- Circuit ground.  
A bypass capacitor (0.1µF) should be placed as close as possible to each VDD pin. If these bypass capacitors  
are not close to the pins their high frequency filtering characteristic will be canceled by the lead inductances of  
the traces.  
MAXIMUM RATINGS  
This device contains circuitry to protect the inputs  
against damage due to high static voltages or electric  
Voltage Relative to VSS:  
Voltage Relative to VDD:  
Storage Temperature:  
Ambient Temperature:  
Maximum Power Supply:  
-0.3V  
0.3V  
field; however, precautions should be taken to avoid  
application of any voltage higher than the maximum  
rated voltages to this circuit. For proper operation, Vin  
and Vout should be constrained to the range:  
-65ºC to + 150ºC  
-55ºC to +125ºC  
7V  
VSS<(Vin or Vout)<VDD  
Unused inputs must always be tied to an appropriate  
logic voltage level (either VSS or VDD).  
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.  
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571  
Rev.1.1  
6/26/97  
Page 2 of 6  

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