SG521/22/24/28
Spread Spectrum Clock Generator
Approved Product
Pin Configuration
VDD
OSCin
OSCout
VSS
1
2
3
4
5
6
7
8
16
15
TEST
VDD
SG521
---------- 14
SG522
MPCLK/S3
VSS
13
----------
SG524
----------
SG528
S4
12
11
10
9
PRCLK/S2
VSS
VDD
S0
SS-SEL
SSON
S1
Figure 2. SG521/22/24/28 SOIC Package Pin Assignment
Pin Description
Pin
#
Signal
Name
VDD
I/O Default
Description
State
1
P
I
Power Positive Power Supply.
2
3
4
5
OSCin
OSCout
VSS
N/A
N/A
GND.
1
Input pin of on-chip reference oscillator.
O
P
I
Output pin of on-chip reference oscillator. If Crystal Oscillator is used, this pin is left unconnected.
Power Supply Ground.
S4
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-up
resistor to VDD. Refer to Frequency Selection Tables for Truth Table.
6
7
VDD
S0
P
I
Positive Power Supply
0
0
1
1
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-down
resistor to GND. Refer to Frequency Selection Tables for Truth Table.
8
9
S1
I
I
I
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-down
resistor to GND. Refer to Frequency Selection Tables for Truth Table.
SSON
SS-SEL
Input digital control pin used to enable or disable the frequency modulation function at PRCLK Output
(Pin-12). When this pin is low (GND) spread function is on. When high (VDD), spread function is turned-
off. This pin has 150 K ohm internal pulled-up to VDD.
10
Used to select total Frequency Modulation (Spread) amount. The spread is either 1.00%(Narrow) or
3.00%(Wide). Both spreads are down-center with respect to output frequency at PRCLK (Pin-12). Refer
to Frequency and Spread selection Tables for the Spread selection logic states. This pin has 150 K
internal pull-up resistor to VDD.
11
12
VSS
P
GND.
1
Power Supply Ground
PRCLK/S2 I/O
Bi-directional pin used to share input control and output drive function. During power-on, this pin is a
digital input and latches that state (High or Low) into an internal register as a valid S2 state. After power
has reached a pre-determined level, pin 12 becomes the driver for the PRCLK modulated output clock.
This pin has 150 K ohm internal pull-up resistor to VDD. For proper operation, an external 4.7 K ohm
resistor connected to VDD or VSS is required. Refer to Frequency Selection Truth Tables for proper
operation.
13
14
VSS
P
GND.
1
Power Supply Ground
MPCLK/S3 O/I
Bi-directional pin used to share input control and output drive function. During power-on, this pin is a
digital input and latches that state (High or Low) into an internal register as a valid S3 state. After power
has reached a pre-determined level, pin 14 becomes the driver for the MPCLK non-modulated output
clock. This pin has 150 K ohm internal pull-up resistor to VDD. Refer to Frequency Selection Truth
Tables for proper operation.
15
16
VDD
P
I
Power Positive Power Supply
Provides Power-Down and Hi-Z function when used in conjunction with S0 and S1 digital inputs. This
pin has internal pull-down to GND. Refer to Frequency Selection Truth Tables for proper operation.
TEST
0
INTERNATIONAL MICROCIRCUITS,INC. 525 LOS COCHES ST.,
MILPITAS, CA 95035 408-263-6300, FAX 408-263-6571
http:/www.imicorp.com
Rev. 1.3
7/21/1999
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