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ILS1-67205V-65 PDF预览

ILS1-67205V-65

更新时间: 2024-11-16 19:59:27
品牌 Logo 应用领域
TEMIC 时钟先进先出芯片内存集成电路
页数 文件大小 规格书
15页 143K
描述
FIFO, 8KX9, 65ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32

ILS1-67205V-65 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, LCC-32Reach Compliance Code:unknown
风险等级:5.86最长访问时间:65 ns
最大时钟频率 (fCLK):12.5 MHz周期时间:80 ns
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
内存密度:73728 bit内存集成电路类型:OTHER FIFO
内存宽度:9功能数量:1
端子数量:32字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX9可输出:NO
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
电源:3.3 V认证状态:Not Qualified
最大待机电流:0.00004 A子类别:FIFOs
最大压摆率:0.07 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUADBase Number Matches:1

ILS1-67205V-65 数据手册

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MATRA MHS  
L 67205  
8K × 9 / 3.3 Volts CMOS Parallel FIFO  
Introduction  
The L67205 implements a first-in first-out algorithm, Using an array of eigh transistors (8 T) memory cell and  
featuring asynchronous read/write operations. The FULL fabricated with the state of the art 1.0 µm lithography  
and EMPTY flags prevent data overflow and underflow. named SCMOS, the L 67205 combine an extremely low  
The Expansion logic allows unlimited expansion in word standby supply current (typ = 1.0 µA) with a fast access  
size and depth with no timing penalties. Twin address time at 55 ns over the full temperature range. All versions  
pointers automatically generate internal read and write offer battery backup data retention capability with a  
addresses, and no external address information are typical power consumption at less than 5 µW.  
required for the MHS FIFOs. Address pointers are  
For military/space applications that demand superior  
automatically incremented with the write pin and read  
levels of performance and reliability the L 67205 is  
pin. The 9 bits wide data are used in data communications  
processed according to the methods of the latest revision  
applications where a parity bit for error checking is  
of the MIL STD 883 (class B or S) and/or ESA SCC 9000.  
necessary. The Retransmit pin reset the Read pointer to  
zero without affecting the write pointer. This is very  
useful for retransmitting data when an error is detected in  
the system.  
Features  
D First-in first-out dual port memory  
D Single supply 3.3 ± 0.3 volts  
D 8192 × 9 organisation  
D Fast access time  
D Fully expandable by word width or depth  
D Asynchronous read/write operations  
D Empty, full and half flags in single device mode  
D Retransmit capability  
55, 60, 65 ns, commercial, industrial military  
and automotive  
D Bi-directional applications  
D Battery back-up operation 2 V data retention  
D High performance SCMOS technology  
D Wide temperature range :  
– 55 °C to + 125 °C  
D 67205L low power  
67205V very low power  
Rev. C (10/11/94)  
1

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