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IDT79R4650100DP PDF预览

IDT79R4650100DP

更新时间： 2024-11-28 15:34:51
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路
页数 文件大小 规格书
25页 278K
描述
64-BIT, 100MHz, RISC PROCESSOR, PQFP208, 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, QFP-208

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中文翻译

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IDT79R4650100DP 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：FQFP,
针数：208Reach Compliance Code：compliant
风险等级：5.92地址总线宽度：64
位大小：64边界扫描：NO
最大时钟频率：50 MHz外部数据总线宽度：64
格式：FLOATING POINT集成缓存：YES
JESD-30 代码：S-PQFP-G208JESD-609代码：e0
长度：28 mm低功率模式：YES
端子数量：208最高工作温度：85 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：FQFP封装形状：SQUARE
封装形式：FLATPACK, FINE PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：4.1 mm
速度：100 MHz最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES温度等级：OTHER
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：28 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR, RISCBase Number Matches：1

IDT79R4650100DP 数据手册

 浏览型号IDT79R4650100DP的Datasheet PDF文件第2页浏览型号IDT79R4650100DP的Datasheet PDF文件第3页浏览型号IDT79R4650100DP的Datasheet PDF文件第4页浏览型号IDT79R4650100DP的Datasheet PDF文件第5页浏览型号IDT79R4650100DP的Datasheet PDF文件第6页浏览型号IDT79R4650100DP的Datasheet PDF文件第7页 
IDT79RC4650™  
Low-Cost 64-bit  
RISController  
w/DSP Capability  
◆
Large, efficient on-chip caches  
Features  
–
–
–
–
–
Separate 8kB Instruction and 8kB Data caches  
Over 3200MB/sec bandwidth from internal caches  
2-set associative  
Write-back and write-through support  
Cache locking to facilitate deterministic response  
◆
High-performance embedded 64-bit microprocessor  
–
–
–
64-bit integer operations  
64-bit registers  
100MHz, 133MHz, 150 MHz, 180MHz, 200MHz and 267MHz  
operation frequencies  
◆
Bus compatible with RC4000 family  
◆
High-performance DSP capability  
–
–
–
System interface provides bandwidth up to 1000 MB/S  
Direct interface to 32-bit wide or 64-bit wide systems  
Synchronized to external reference clock for multi-master  
operation  
–
133.5 Million Integer Multiply-Accumulate Operations/sec @  
267 MHz  
◆
High-performance microprocessor  
–
–
–
133.5 M Mul-Add/second at 267MHz  
89 MFL0P/s at 250MHz  
>640,000 dhrystone (2.1)/sec capability at 267MHz  
(352 dhrystone MIPS)  
–
◆
Socket compatible with IDT RC64475 and RC64575  
Improved real-time support  
Fast interrupt decode  
Optional cache locking  
–
◆
High level of integration  
◆
Note:“R” refers to 5V parts; “RV” refers to 3.3V parts; “RC”  
refers to both  
–
–
–
64-bit, 267 MHz integer CPU  
8KB instruction cache; 8KB data cache  
Integer multiply unit with 133.5M Mul-Add/sec  
◆
Low-power operation  
–
–
Active power management powers-down inactive units  
Standby mode  
◆
Upwardly software compatible with IDT RISController  
Family  
Block Diagram  
352 M IPS 64-bit C PU  
System C ontrol C oprocessor  
89M FL O PS Single-Precision FPA  
Address Translation/  
Cache Attribute Control  
64-bit register file  
FP register file  
Pack/Unpack  
64-bit adder  
Load aligner  
Store Aligner  
Logic Unit  
Exception M anagem ent  
Functions  
FP Add/Sub/C vt/  
Div/Sqrt  
H igh-Perform ance  
Integer M ultiply  
FP M ultiply  
Control Bus  
Data Bus  
Instruction Bus  
Instruction Cache  
Set A  
(Lockable)  
Data Cache  
Set A  
(Lockable)  
Instruction Cache  
Set B  
32-/64-bit  
Synchronized  
System Interface  
D ata C ache  
Set  
B
The IDT logo is a registered trademark and ORION, RC4600, RC4650, RV4650, RC4700, RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trademarks of Integrated Device Technology, Inc.  
1 of 25  
April 10, 2001  
DSC 3149/3  
2001 Integrated Device Technology, Inc.  
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