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IDT74FCT841ATPY8 PDF预览

IDT74FCT841ATPY8

更新时间: 2024-11-23 14:51:27
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 61K
描述
Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24, SSOP-24

IDT74FCT841ATPY8 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP24,.3
针数:24Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.88
Is Samacsys:N其他特性:POWER OFF DISABLE OUTPUTS
系列:FCTJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:8.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.048 A位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP24,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):16 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

IDT74FCT841ATPY8 数据手册

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FAST CMOS BUS  
IDT74FCT841AT/CT  
INTERFACE LATCH  
FEATURES:  
DESCRIPTION:  
• A and C grades  
The FCT841T series is built using an advanced dual metal CMOS  
technology.  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility:  
– VOH = 3.3V (typ.)  
– VOL = 0.3V (typ.)  
• High Drive outputs (-15mA IOH, 48mA IOL)  
• Meets or exceeds JEDEC standard 18 specifications  
• Power off disable outputs permit "live insertion"  
• Available in SOIC, SSOP, and QSOP packages  
The FCT841T bus interface latches are designed to eliminate the extra  
packages required to buffer existing latches and provide extra data width  
for wider address/data paths or buses carrying parity. The FCT841T are  
buffered, 10-bit wide versions of the popular FCT373T function. They are  
ideal for use as an output port requiring high IOL/IOH.  
All of the FCT841T high-performance interface family can drive large  
capacitiveloads,whileprovidinglow-capacitancebusloadingatbothinputs  
and outputs. All inputs have clamp diodes to ground and all outputs are  
designed for low-capacitance bus loading in high-impedance state.  
FUNCTIONALBLOCKDIAGRAM  
D0  
D1  
D2  
D3  
D4  
D5  
D8  
D9  
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
LE  
LE  
LE  
LE  
LE  
LE  
LE  
LE  
LE  
OE  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y8  
Y9  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-2571/9  

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