5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 时钟驱动器> IDT74FCT32932-100PA
IDT74FCT32932-100PA PDF预览

IDT74FCT32932-100PA

更新时间： 2024-11-15 22:36:11
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器光电二极管
页数 文件大小 规格书
9页 135K
描述
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

阅读下载

中文翻译

获取价格

IDT74FCT32932-100PA 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Contact ManufacturerReach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.88
Is Samacsys：NJESD-30 代码：R-PDSO-G48
JESD-609代码：e0最大I（ol）：0.008 A
湿度敏感等级：1端子数量：48
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：225
电源：3.3 VProp。Delay @ Nom-Sup：0.5 ns
认证状态：Not Qualified子类别：Clock Drivers
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn85Pb15)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30Base Number Matches：1

IDT74FCT32932-100PA 数据手册

 浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第2页浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第3页浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第4页浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第5页浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第6页浏览型号IDT74FCT32932-100PA的Datasheet PDF文件第7页 
IDT74FCT3932-100  
IDT74FCT32932-100  
ADVANCE INFORMATION  
3.3V LOW SKEW PLL-BASED  
CMOS CLOCK DRIVER  
Integrated Device Technology, Inc.  
feedbackpathdelayshouldbemadetomatchthisoutputpath  
delay.  
The PLL consists of the phase/frequency detector, charge  
pump, loopfilterandVCO. TheFCT3932requiresnoexternal  
loop filter components.  
The FCT3932 provides 17 outputs grouped in 3 banks with  
individual 3-state control and an additional dedicated feed-  
backoutputwithnodisable. ConnectingQ_FBtoFEEDBACK  
ensures uninterrupted PLL operation when all outputs are  
disabled.  
Individual bank 3-state allows users to disable unused  
outputs in order to limit power dissipation or minimize switch-  
ing noise. It also allows users to shut down outputs in low  
power modes while maintaining phase lock.  
TheFCT3932providesaLOCKpinthatgoeshighwhenthe  
device is phase-locked.  
The user can bypass the PLL for testability purposes by  
deasserting PLL_EN. In this "test" mode, the input frequency  
is not limited to the specified range.  
The FCT3932 provides an asynchronous reset input, RST,  
whichresetsalloutputs. Thisinitializesallinternalregistersso  
that outputs start up in a known state.  
FEATURES:  
• 0.5 MICRON CMOS Technology  
• Guaranteed low skew  
• 16 programmable frequency configurations  
• 17 3-state outputs:  
±24 mA FCT3932  
±8 mA FCT32932  
• Output configuration:  
BANK1: 4 outputs  
BANK2: 8 outputs  
BANK3: 5 outputs  
• Dedicated feedback output (Q_FB)  
• Maximum output frequency: 100MHz  
• VCC = 3.3V ±0.3V  
• Inputs can be driven from 3.3V or 5V components  
• Available in 48 SSOP, TSSOP packages  
• Suited to SDRAM applications  
DESCRIPTION:  
The FCT3932 uses phase-lock loop technology to lock the  
frequency and phase of the feedback to the input reference  
clock. It provides a large number of low skew outputs that are  
configurable in 16 different modes using the CNTRL 1-4  
inputs. A dedicated output, Q_FB, is provided to supply the  
PLL feedback and it should be connected to the FEEDBACK  
input. Q_FB is located adjacent to FEEDBACK to minimize  
the delay in the feedback path. In order to offset any delay in  
theoutputpathfromtheFCT3932outputtoareceivingdevice,  
APPLICATIONS:  
SDRAM DIMM Clock, Caches, high speed microproces-  
sors, motherboard clock distribution to DIMMs.  
FUNCTIONAL BLOCK DIAGRAM  
LOCK  
FEEDBACK  
Voltage  
Controlled  
Oscillator  
Charge  
Pump &  
Loop Filter  
Phase/Freq.  
Detector  
REF_IN  
0
1
PLL_EN  
Mux  
OE1  
OE2  
Q41-4  
(BANK 1)  
C
O
N
T
R
O
L
Q81-8  
(BANK 2)  
OE3  
Q51-5  
(BANK 3)  
CNTRL1-4  
Q_FB  
RST  
3267 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
NOVEMBER 1996  
1996 Integrated Device Technology, Inc.  
9.9  
DSC-3267/2  
1
1234567...9

中文翻译

下载PDF

与IDT74FCT32932-100PA相关器件

型号 品牌 获取价格 描述 数据表
IDT74FCT32932-100PV IDT

获取价格

 		3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER
IDT74FCT3373AP ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3373APY ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3373ASO ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3373P ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3373PY ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3373SO ETC

获取价格

 		8-Bit D-Type Latch
IDT74FCT3374AP ETC

获取价格

 		Octal D-Type Flip-Flop
IDT74FCT3374APY ETC

获取价格

 		Octal D-Type Flip-Flop
IDT74FCT3374ASO ETC

获取价格

 		Octal D-Type Flip-Flop

与IDT74FCT32932-100PA相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证