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IDT74ALVCF162835APA8 PDF预览

IDT74ALVCF162835APA8

更新时间: 2024-11-18 14:51:27
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 103K
描述
Bus Driver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TSSOP-56

IDT74ALVCF162835APA8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.44系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:14 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:3.3 V
传播延迟(tpd):5.6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:6.1 mm
Base Number Matches:1

IDT74ALVCF162835APA8 数据手册

 浏览型号IDT74ALVCF162835APA8的Datasheet PDF文件第2页浏览型号IDT74ALVCF162835APA8的Datasheet PDF文件第3页浏览型号IDT74ALVCF162835APA8的Datasheet PDF文件第4页浏览型号IDT74ALVCF162835APA8的Datasheet PDF文件第5页浏览型号IDT74ALVCF162835APA8的Datasheet PDF文件第6页 
3.3V CMOS 18-BIT  
IDT74ALVCF162835A  
UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
DESCRIPTION:  
FEATURES:  
0.5 MICRON CMOS Technology  
TypicaltSK(0) (Output Skew) < 250ps  
This 18-bit universal bus driver is built using advanced dual metal  
CMOS technology. Data flow from A to Y is controlled by the output-  
enable (OE) input. The device operates in the transparent mode  
when the latch-enable (LE) input is high. The A data is latched if the  
clock (CLK) input is held at a high or low logic level. If LE is low, the  
A data is stored in the latch flip-flop on the low-to-high transition of  
CLK. When OE is high, the outputs are in the high-impedance state.  
ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
0.635mm pitch SSOP, 0.50mm pitch TSSOP,  
and 0.40mm pitch TVSOP packages  
Extended commercial range of – 40°C to + 85°C  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
CMOS power levels (0.4µW typ. static)  
Rail-to-Rail output swing for increased noise margin  
The ALVCF162835A has series resistors in the device output  
structure which will reduce switching noise in 128MB and 256MB  
SDRAM modules. Designed with a drive capability of ±18mA, the  
ALVCF162835A is a mid-way drive between the ALVC162835  
(±12mA) and ALVC16835 (±24mA).  
Drive Features for ALVCF162835A:  
Balanced Output Drivers: ±18mA  
Low switching noise  
The ALVCF162835A is a faster version of the ALVCF162835 or  
ALVC162835. It is suitable for PC133 applications and particularly  
SDRAM Modules clocked at 133 MHz.  
APPLICATIONS:  
SDRAM Modules  
PC Motherboards  
Workstations  
Functional Block Diagram  
27  
OE  
30  
CLK  
28  
LE  
54  
A1  
1D  
3
Y1  
C1  
CLK  
TO 17 OTHER CHANNELS  
EXTENDED COMMERCIAL TEMPERATURE RANGE  
MAY 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-4920/-  

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