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IDT728985DB PDF预览

IDT728985DB

更新时间: 2024-11-23 13:08:43
品牌 Logo 应用领域
艾迪悌 - IDT 开关
页数 文件大小 规格书
13页 109K
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IDT728985DB 数据手册

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TIME SLOT INTERCHANGE  
DIGITAL SWITCH  
256 x 256  
IDT728985  
andwriteaccess toindividualchannels.As animportantfunctionofadigital  
switchis tomaintainsequenceintegrityandminimizethroughputdelay,the  
IDT728985isanidealsolutionformostswitchingneeds.  
ꢀEATURES:  
256 x 256 channel non-blocking switch  
Automatic signal identification (ST-BUS®, GCI)  
8 RX inputs — 32 channels at 64 Kbit/s per serial line  
8 TX outputs — 32 channels at 64 Kbit/s per serial line  
Three-state serial outputs  
Microprocessor Interface (8-bit data bus)  
Frame Integrity for data applications  
5V Power Supply  
Operating Temperature Range -40°C to +85°C  
Available in 44-pin Plastic Leaded Chip Carrier (PLCC),  
44-pin Plastic Quad Flatpack (PQFP) and 40-pin Plastic Dip  
(P-DIP)  
ꢀUNCTIONALDESCRIPTION  
Framesequence,constantthroughputdelay,andguaranteedminimum  
delayarehighpriorityrequirementsintodaysintegrateddataandmultimedia  
networks. TheIDT728985provides thesefunctions onaper-channelbasis  
usingastandardmicroprocessorcontrolinterface. Eachoftheeightseriallines  
is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data.  
InProcessorMode,themicroprocessorcanaccesstheinputandoutputtime  
slotstocontrolotherdevicessuchasISDNtransceiversandtrunkinterfaces.  
SupportingbothGCIandST-BUS® formats,IDT728985hasincorporatedan  
internal circuit to automatically identify the polarity and format of the frame  
synchronization.  
DESCRIPTION:  
TheIDT728985isaST-BUS®/GCIcompatibledigitalswitchcontrolledby  
amicroprocessor. TheIDT728985canhandleasmanyas256,64Kbit/sinput  
andoutputchannels. Those256channelsaredividedinto8serialinputsand  
outputs,eachofwhichconsistsof32channels. TheIDT728985providesper-  
channelvariableorconstantthroughputdelaymodesandmicroprocessorread  
AfunctionalblockdiagramoftheIDT728985deviceisshownonpage1.  
The serial streams operate continuously at 2.048 Mb/s and are arranged in  
125µswideframeseachcontaining32,8-bitchannels. Eightinput(RX0-7)and  
ꢀUNCTIONAL BLOCK DIAGRAM  
ODE  
C4i  
F0i  
VCC GND  
TX0  
TX1  
TX2  
TX3  
TX4  
TX5  
TX6  
TX7  
Timing  
Unit  
RX0  
RX1  
RX2  
RX3  
RX4  
RX5  
RX6  
RX7  
Output MUX  
Receive  
Serial Data  
Streams  
Transmit  
Serial Data  
Streams  
Data  
Memory  
Connection  
Memory  
Control Register  
Microprocessor Interface  
5708 drw01  
CCO  
DS  
A0/  
A5  
CS  
R/W  
D0/  
D7  
DTA  
APRIL 2001  
1
2001 Integrated Device Technology, Inc.  
DSC-5708/2  

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