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IDT7284L20PA8 PDF预览

IDT7284L20PA8

更新时间: 2024-11-24 08:19:23
品牌 Logo 应用领域
艾迪悌 - IDT 时钟先进先出芯片光电二极管内存集成电路
页数 文件大小 规格书
12页 153K
描述
FIFO, 4KX9, 20ns, Asynchronous, CMOS, PDSO56, TSSOP-56

IDT7284L20PA8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-56针数:56
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.47
最长访问时间:20 ns最大时钟频率 (fCLK):33 MHz
周期时间:30 nsJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:14 mm
内存密度:36864 bit内存集成电路类型:OTHER FIFO
内存宽度:9湿度敏感等级:1
功能数量:2端子数量:56
字数:4096 words字数代码:4000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4KX9
可输出:NO封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:FIFOs
最大压摆率:0.15 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:6.1 mmBase Number Matches:1

IDT7284L20PA8 数据手册

 浏览型号IDT7284L20PA8的Datasheet PDF文件第2页浏览型号IDT7284L20PA8的Datasheet PDF文件第3页浏览型号IDT7284L20PA8的Datasheet PDF文件第4页浏览型号IDT7284L20PA8的Datasheet PDF文件第5页浏览型号IDT7284L20PA8的Datasheet PDF文件第6页浏览型号IDT7284L20PA8的Datasheet PDF文件第7页 
IDT7280  
IDT7281  
IDT7282  
IDT7283  
IDT7284  
IDT7285  
CMOS DUAL ASYNCHRONOUS FIFO  
DUAL 256 x 9, DUAL 512 x 9,  
DUAL 1,024 x 9, DUAL 2,048 x 9,  
DUAL 4,096 x 9, DUAL 8,192 x 9  
FEATURES:  
DESCRIPTION:  
The IDT7280 is equivalent to two IDT7200 256 x 9 FIFOs  
The IDT7281 is equivalent to two IDT7201 512 x 9 FIFOs  
The IDT7282 is equivalent to two IDT7202 1,024 x 9 FIFOs  
The IDT7283 is equivalent to two IDT7203 2,048 x 9 FIFOs  
The IDT7284 is equivalent to two IDT7204 4,096 x 9 FIFOs  
The IDT7285 is equivalent to two IDT7205 8,192 x 9 FIFOs  
Low power consumption  
The IDT7280/7281/7282/7283/7284/7285 are dual-FIFO memories that  
loadandemptydataonafirst-in/first-outbasis.Thesedevicesarefunctional  
andcompatibletotwoIDT7200/7201/7202/7203/7204/7205FIFOsinasingle  
packagewithallassociatedcontrol,data,andflaglinesassignedtoseparate  
pins. The devices use Full and Empty flags to prevent data overflow and  
underflowandexpansionlogictoallowforunlimitedexpansioncapabilityinboth  
word size and depth.  
Active: 685 mW (max.)  
— Power-down: 83 mW (max.)  
Ultra high speed12 ns access time  
Asynchronous and simultaneous read and write  
Offers optimal combination of data capacity, small foot print  
and functional flexibility  
Ideal for bi-directional, width expansion, depth expansion,  
bus-matching, and data sorting applications  
Status Flags: Empty, Half-Full, Full  
Thereadsandwritesareinternallysequentialthroughtheuseofringpointers,  
withnoaddressinformationrequiredtoloadandunloaddata.Dataistoggled  
inandoutofthedevices throughtheuseoftheWrite(W)andRead(R)pins.  
Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits  
attheusersoption.Thisfeatureis especiallyusefulindatacommunications  
applicationswhereitisnecessarytouseaparitybitfortransmission/reception  
errorchecking.ItalsofeaturesaRetransmit(RT)capabilitythatallowsforreset  
of the read pointer to its initial position when RT is pulsed LOW to allow for  
retransmissionfromthebeginningofdata.AHalf-FullFlagisavailableinthe  
singledevicemodeandwidthexpansionmodes.  
Auto-retransmit capability  
High-performance CMOS technology  
Space-saving TSSOP  
These FIFOs are fabricated using IDTs high-speed CMOS technology.  
Theyaredesignedforthoseapplicationsrequiringasynchronousandsimul-  
taneousread/writesinmultiprocessingandratebufferapplications.  
Industrial temperature range (–40  
Green parts available, see ordering information  
°C to +85°C) is available  
FUNCTIONAL BLOCK DIAGRAM  
DATA INPUTS  
DATA INPUTS  
(DA0-DA8)  
(DB0-DB8)  
RSA  
RSB  
WB  
WRITE  
CONTROL  
WRITE  
CONTROL  
RAM  
RAM  
WA  
ARRAY A  
256 x 9  
ARRAY B  
256 x 9  
512 x 9  
512 x 9  
1,024 x 9  
2,048 x 9  
4,096 x 9  
8,192 x 9  
1,024 x 9  
2,048 x 9  
4,096 x 9  
8,192 x 9  
WRITE  
POINTER  
WRITE  
POINTER  
READ  
POINTER  
READ  
POINTER  
THREE-  
STATE  
BUFFERS  
THREE-  
STATE  
BUFFERS  
READ  
CONTROL  
READ  
CONTROL  
RA  
RESET  
LOGIC  
RESET  
LOGIC  
FLAG  
LOGIC  
FLAG  
LOGIC  
EXPANSION  
LOGIC  
EXPANSION  
LOGIC  
XIA  
FFA EFA  
RB  
XIB  
XOA/HFA  
FLA/RTA  
FFB EFB  
FLB/RTB  
DATA  
OUTPUTS  
(QA0-QA8)  
XOB/HFB  
DATA  
OUTPUTS  
(QB0-QB8)  
3208 drw 01  
IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc  
COMMERCIALANDINDUSTRIALTEMPERATURERANGES  
JULY 2006  
1
2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-3208/7  

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