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IDT72291L20PFI PDF预览

IDT72291L20PFI

更新时间： 2024-02-08 22:36:50
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
26页 270K
描述
CMOS SuperSync FIFO

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中文翻译

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IDT72291L20PFI 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：QFP
包装说明：STQFP-64针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.84
Is Samacsys：N最长访问时间：12 ns
其他特性：RETRANSMIT; AUTO POWER DOWN; EASY EXPANDABLE IN DEPTH AND WIDTH周期时间：20 ns
JESD-30 代码：S-PQFP-G64JESD-609代码：e3
长度：10 mm内存密度：1179648 bit
内存宽度：9湿度敏感等级：3
功能数量：1端子数量：64
字数：131072 words字数代码：128000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128KX9
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH并行/串行：PARALLEL
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.6 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：10 mmBase Number Matches：1

IDT72291L20PFI 数据手册

 浏览型号IDT72291L20PFI的Datasheet PDF文件第1页浏览型号IDT72291L20PFI的Datasheet PDF文件第2页浏览型号IDT72291L20PFI的Datasheet PDF文件第3页浏览型号IDT72291L20PFI的Datasheet PDF文件第5页浏览型号IDT72291L20PFI的Datasheet PDF文件第6页浏览型号IDT72291L20PFI的Datasheet PDF文件第7页 
IDT72281/72291  
CMOS SuperSync FIFO™ 65,536 x 9 and 131,072 x 9  
COMMERCIALANDINDUSTRIAL  
TEMPERATURERANGES  
PINDESCRIPTION  
Symbol  
D0–D8  
MRS  
Name  
DataInputs  
I/O  
Description  
I
I
Datainputs fora9-bitbus.  
MasterReset  
PartialReset  
Retransmit  
MRS initializes the readandwrite pointers tozeroandsets the outputregistertoallzeroes. During  
Master Reset, the FIFO is configured for either FWFT or IDT Standard mode, one of two program-  
mableflagdefaultsettings,andserialorparallelprogrammingoftheoffsetsettings.  
PRS  
RT  
I
I
PRS initializes thereadandwritepointers tozeroandsets theoutputregistertoallzeroes. During  
PartialReset, the existingmode (IDTorFWFT), programmingmethod(serialorparallel), and  
programmableflagsettingsareallretained.  
RT assertedonthe risingedge ofRCLKinitializes the READpointertozero, sets the EF flagto  
LOW (OR to HIGH in FWFT mode) temporarily and does not disturb the write pointer, program  
ming method, existing timing mode or programmable flag settings. RT is useful to reread data from  
the first physical location of the FIFO.  
FWFT/SI  
WCLK  
FirstWordFall  
Through/Serial In  
I
I
DuringMasterReset, selects FirstWordFallThroughorIDTStandardmode. AfterMasterReset,  
thispinfunctionsasaserialinputforloadingoffsetregisters  
WriteClock  
WhenenabledbyWEN, the risingedge ofWCLKwrites data intothe FIFOand offsets intothe  
programmable registers forparallelprogramming, andwhenenabledbySEN, the risingedge of  
WCLKwritesonebitofdataintotheprogrammableregisterforserialprogramming.  
WEN  
RCLK  
WriteEnable  
ReadClock  
I
I
WENenablesWCLKforwritingdataintotheFIFOmemoryandoffsetregisters.  
WhenenabledbyREN, the risingedge ofRCLKreads data fromthe FIFOmemoryandoffsets from  
theprogrammableregisters.  
REN  
OE  
SEN  
LD  
ReadEnable  
OutputEnable  
SerialEnable  
Load  
I
I
I
I
RENenables RCLKforreadingdatafromtheFIFOmemoryandoffsetregisters.  
OEcontrolstheoutputimpedanceofQn.  
SENenablesserialloadingofprogrammableflagoffsets.  
During Master Reset, LD selects one of two partial flag default offsets (127 or 1,023 and determines  
the flag offset programming method, serial or parallel. After Master Reset, this pin enables writing to  
andreadingfromtheoffsetregisters.  
DC  
Don't Care  
I
This pinmustbe tiedtoeitherVCCorGNDandmustnottoggle afterMasterReset.  
FF/IR  
Full Flag/  
Input Ready  
O
In the IDT Standard mode, the FF functionis selected. FF indicates whetherornotthe FIFO  
memoryis full. Inthe FWFTmode, the IR functionis selected. IR indicates whetherornotthere is  
spaceavailableforwritingtotheFIFOmemory.  
EF/OR  
PAF  
EmptyFlag/  
OutputReady  
O
O
O
Inthe IDTStandardmode, the EF functionis selected. EF indicates whetherornotthe FIFO  
memoryis empty. InFWFTmode, the OR functionis selected. OR indicates whetherornotthere  
isvaliddataavailableattheoutputs.  
Programmable  
Almost-FullFlag  
PAF goes LOWifthe numberofwords inthe FIFOmemoryis more than totalwordcapacityofthe  
FIFOminus thefulloffsetvaluem,whichis storedintheFullOffsetregister. Therearetwopossible  
default values for m: 127 or 1,023.  
PAE  
Programmable  
Almost-EmptyFlag  
PAE goes LOWifthe numberofwords inthe FIFOmemoryis less thanoffsetn, whichis storedin  
the EmptyOffsetregister. There are twopossible defaultvalues forn:127or1,023. Othervalues  
forncanbe programmedintothe device.  
HF  
Q0–Q8  
VCC  
Half-FullFlag  
DataOutputs  
Power  
O
O
HF indicates whethertheFIFOmemoryis moreorless thanhalf-full.  
Dataoutputsfora9-bus  
+5 Volt power supply pins.  
GND  
Ground  
Groundpins.  
4
1234567...26

中文翻译

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与IDT72291L20PFI相关器件

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IDT72291L20TF9 IDT FIFO, 128KX9, 12ns, Synchronous, CMOS, PQFP64, STQFP-64

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IDT72291L20TFG IDT FIFO, 128KX9, 12ns, Synchronous, CMOS, PQFP64, STQFP-64

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