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ICS8402AKIT PDF预览

ICS8402AKIT

更新时间: 2024-11-14 12:28:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
19页 2229K
描述
350MHZ, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER

ICS8402AKIT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN,针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.89
JESD-30 代码:S-XQCC-N32JESD-609代码:e0
长度:5 mm端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:350 MHz封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):225
主时钟/晶体标称频率:40 MHz认证状态:Not Qualified
座面最大高度:1 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS8402AKIT 数据手册

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350MHZ, CRYSTAL-TO-LVCMOS/LVTTL  
FREQUENCY SYNTHESIZER  
ICS8402I  
General Description  
Features  
The ICS8402I is a general purpose,  
Two LVCMOS/LVTTL outputs  
S
IC  
Crystal-to-LVCMOS/LVTTL High Frequency  
Synthesizer and a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
IDT. The ICS8402I has a selectable TEST_CLK or  
Selectable crystal oscillator interface or LVCMOS/LVTTL  
HiPerClockS™  
TEST_CLK  
Output frequency range: 15.625MHz to 350MHz  
Crystal input frequency range: 12MHz to 40MHz  
VCO range: 250MHz to 700MHz  
crystal inputs. The VCO operates at a frequency range of 250MHz  
to 700MHz. The VCO frequency is programmed in steps equal to  
the value of the input reference or crystal frequency. The VCO and  
output frequency can be programmed using the serial or parallel  
interfaces to the configuration logic. The low phase noise  
characteristics of the ICS8402I make it an ideal clock source for  
Gigabit Ethernet and SONET applications.  
Parallel or serial interface for programming counter and  
output dividers  
RMS period jitter: 30ps (maximum)  
Cycle-to-cycle jitter: 100ps (maximum)  
Full 3.3V or mixed 3.3V core/2.5V output supply  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Pin Assignment  
Block Diagram  
OE0  
OE1  
32 31 30 29 28 27 26 25  
VCO_SEL  
XTAL_SEL  
M5  
M6  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
XTAL_OUT  
TEST_CLK  
XTAL_SEL  
VDDA  
TEST_CLK  
0
M7  
XTAL_IN  
M8  
1
OSC  
N0  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
XTAL_OUT  
N1  
nc  
GND  
PLL  
9
10 11 12 13 14 15 16  
PHASE DETECTOR  
÷2  
÷4  
0
1
MR  
VCO  
Q0  
Q1  
÷8  
ICS8402I  
32 Lead LQFP  
÷16  
÷ M  
7mm x 7mm x 1.4mm package body  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
Y Package  
Top View  
TEST  
M0:M8  
N0:N1  
32 Lead VFQFN  
5mm x 5mm x 0.925mm package body  
K Package  
Top View  
IDT™ / ICS™ LVCMOS/LVTTL FREQUENCY SYNTHESIZER  
1
ICS8402AYI REV. A OCTOBER 16, 2007  

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