Datasheet > IC-MNEVALMN1D

IC-MNEVALMN1D

更新时间： 2022-11-08 00:16:46

品牌	Logo	应用领域
ICHAUS		编码器
页数	文件大小	规格书
59页	1705K
描述
25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IC-MNEVALMN1D 数据手册

iC-MN 25-BIT NONIUS ENCODER

WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

Rev D1, Page 5/59

PACKAGES

PIN CONFIGURATION QFN48

PIN FUNCTIONS

No. Name

21 MAO

22 SLI

23 NMA*

24 MA*

Function

I/O Interface, clock output

I/O Interface, data input

I/O Interface, clock input -

I/O Interface, clock input +

25 NSLO* I/O Interface, data output -

26 SLO*

27 MTSLI

28 T3

I/O Interface, data output +

Multiturn Interface, data input

External Trigger Input,

Test Signal Input

29 MTMA

30 T2

Multiturn Interface, clock output

Test Signal Input

31 GND*

32 VDD*

Ground

+4.5 to 5.5 V Supply Voltage

33 NERR* Error Message Output,

System Error Message Input

34 n.c.

35 n.c.

36 n.c.

37 NSOUT* Analog Output Sine - (Master)

38 PSOUT* Analog Output Sine + (Master)

39 NCOUT* Analog Output Cosine - (Master)

40 PCOUT* Analog Output Cosine + (Master)

PIN FUNCTIONS

No. Name Function

1 NSINS Signal Input Sine - (Segment)

2 PSINS Signal Input Sine + (Segment)

3 PCINS Signal Input Cosine + (Segment)

4 NCINS Signal Input Cosine - (Segment)

5 NSINM Signal Input Sine - (Master)

6 PSINM Signal Input Sine + (Master)

7 PCINM Signal Input Cosine+ (Master)

8 NCINM Signal Input Cosine - (Master)

9 NSINN Signal Input Sine - (Nonius)

10 PSINN Signal Input Sine + (Nonius)

11 PCINN Signal Input Cosine + (Nonius)

12 NCINN Signal Input Cosine - (Nonius)

13 n.c.

41 T0

42 T1

Test Signal Output

43 ACOM* Signal Level Controller Outp. (Master)

44 VACO* +4.5 to 5.5 V Signal Level Controller

Supply

45 ACON* Signal Level Controller Output

46 ACOS* Signal Level Controller Output,

VREFin Ref. Voltage Input/Output

47 GNDA

48 VDDA

Sub-System Ground Output

Sub-System Positive Supply Output

* :

Pin is immune against faulty output

or supply connection.

14 n.c.

15 n.c.

16 n.c.

n.c. :

Pin is not connected.

17 DIR

Sense of Rotation Preselection Input,

Calibration Signal IPB

18 PRES Preset Input

19 SCL

20 SDA

EEPROM Interface, clock line

EEPROM Interface, data line

Wiring unused input pins can be recommended, especially for pins SLI, DIR, PRES and T2 (to GNDA). For

calibrating the internal bias current source a pull-down resistor of 5 kΩ ±1 % connected from pin DIR to GNDA

is useful (see Figure 10).

To improve heat dissipation the thermal pad of the QFN package (bottom side) should be joined to an extended

copper area which must have GNDA potential.

1 2 3 456 7 8...59

下载PDF

与IC-MNEVALMN1D相关器件

型号	品牌	描述	获取价格	数据表
IC-MNQFN48	ICHAUS	25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION	获取价格
IC-MP	ICHAUS	8-BIT HALL ANGLE ENCODER WITH RATIOMETRIC OUTPUT	获取价格
IC-MPDFN10	ICHAUS	8-BIT HALL ANGLE ENCODER WITH RATIOMETRIC OUTPUT	获取价格
IC-MPEVALMP1D	ICHAUS	8-BIT HALL ANGLE ENCODER WITH RATIOMETRIC OUTPUT	获取价格
IC-MQ	ICHAUS	PROGRAMMABLE 9-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER	获取价格
IC-MQEVALMQ1D	ICHAUS	PROGRAMMABLE 9-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER	获取价格