Datasheet > HYS64V4220GCDL-7.5

HYS64V4220GCDL-7.5

更新时间： 2024-11-24 23:57:31

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
18页	183K
描述
x64 SDRAM Module

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数据手册

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HYS64V4220GCDL-7.5 数据手册

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HYS 64Vx20(2)0GCDL

144-pin SO-DIMM SDRAM Modules

3.3 V SDRAM Modules

144-pin SO-DIMM SDRAM Modules

PC100/PC133

32 MB, 64 MB & 128 MB Density in COB Technique

• 144-pin Eight Byte Small Outline Dual-In-Line • Auto Refresh (CBR) and Self Refresh

Synchronous DRAM Modules for notebook

• Decoupling capacitors mounted on substrate

applications

• All inputs and outputs are LVTTL compatible

• One bank 4M × 64 non-parity organization

• Serial Presence Detect with E²PROM

• Two bank 8M × 64 and 16M × 64 non-parity

module organization

• Uses COB (“Chip-on-Board”) technique

• 4096 refresh cycles every 64 ms

• Gold contact pad

• suitable for use in PC100 and PC133

applications

• Auto ReSingle + 3.3 V (± 0.3 V) power supply

• This module family is fully pin and functional

compatible with the latest INTEL SO-DIMM

specification

• Programmable CAS Latency, Burst Length,

and Wrap Sequence (Sequential &

Interleave)

• Performance:

-7.5

-8

Unit

PC133

3-3-3

PC100

2-2-2

f_CK

t_AC

Clock Frequency (max.)

133

5.4

100

MHz

Clock Access Time

CAS Latency = 2 & 3

This Infineon module family are industry standard 144-pin 8-byte Synchronous DRAM (SDRAM)

Small Outline Dual In-line Memory Modules (SO-DIMM) which are organized as x64 high speed

memory arrays designed for use in non-parity applications. These SO-DIMMs use COB (“Chip-on-

Board”) technology. Decoupling capacitors are mounted on the board.

The DIMMs use optional serial presence detects implemented via a serial E²PROM using the 2-pin

I²C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes

are available to the end user.

All Infineon 144-pin SO-DIMMs provide a high performance, flexible 8-byte interface in a 67.5 mm

long footprint.

Data Book

12.99

12 3 4 5 6 7...18

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