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HY5W2A6CLF-H PDF预览

HY5W2A6CLF-H

更新时间: 2024-01-25 10:09:45
品牌 Logo 应用领域
其他 - ETC 动态存储器
页数 文件大小 规格书
24页 222K
描述
x16 SDRAM

HY5W2A6CLF-H 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA54,9X9,32针数:54
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.84
访问模式:FOUR BANK PAGE BURST最长访问时间:7 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:R-PBGA-B54JESD-609代码:e1
长度:10.5 mm内存密度:134217728 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:54字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:8MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA54,9X9,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH电源:1.8/2.5,2.5 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:1.07 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.0005 A
子类别:DRAMs最大压摆率:0.125 mA
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8.3 mmBase Number Matches:1

HY5W2A6CLF-H 数据手册

 浏览型号HY5W2A6CLF-H的Datasheet PDF文件第1页浏览型号HY5W2A6CLF-H的Datasheet PDF文件第2页浏览型号HY5W2A6CLF-H的Datasheet PDF文件第4页浏览型号HY5W2A6CLF-H的Datasheet PDF文件第5页浏览型号HY5W2A6CLF-H的Datasheet PDF文件第6页浏览型号HY5W2A6CLF-H的Datasheet PDF文件第7页 
HY5W2A6C(L/S)F / HY57W2A1620HC(L/S)T  
HY5W26CF / HY57W281620HCT  
BALL DESCRIPTION  
BALL OUT  
F2  
SYMBOL  
TYPE  
DESCRIPTION  
CLK  
INPUT  
Clock : The system clock input. All other inputs are registered  
to the SDRAM on the rising edge of CLK  
F3  
CKE  
INPUT  
Clock Enable : Controls internal clock signal and when deacti-  
vated, the SDRAM will be one of the states among power  
down, suspend or self refresh  
G9  
CS  
INPUT  
INPUT  
Chip Select : Enables or disables all inputs except CLK, CKE,  
UDQM and LDQM  
G7,G8  
BA0, BA1  
Bank Address : Selects bank to be activated during RAS activ-  
ity  
Selects bank to be read/written during CAS activity  
H7, H8, J8, J7, A0 ~ A11  
J3, J2, H3, H2,  
INPUT  
Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA8  
Auto-precharge flag : A10  
H1, G3, H9, G2  
F8, F7, F9  
RAS, CAS, INPUT  
WE  
Command Inputs : RAS, CAS and WE define the operation  
Refer function truth table for details  
F1, E8  
UDQM,  
LDQM  
INPUT  
Data Mask:Controls output buffers in read mode and masks  
input data in write mode  
A8, B9, B8, C9, DQ0 ~  
C8, D9, D8, E9, DQ15  
E1, D2, D1, C2,  
I/O  
Data Input/Output:Multiplexed data input/output pin  
C1, B2, B1, A2  
A9, E7, J9, A1, VDD/VSS  
E3, J1  
SUPPLY  
SUPPLY  
-
Power supply for internal circuits  
Power supply for output buffers  
No connection  
A7, B3, C7, D3, VDDQ/  
A3, B7, C3, D7 VSSQ  
E2, G1  
NC  
Note. Please find HY5xxxxxxT Series for standard 54TSOP-II pin configuration & description.  
Rev. 1.2 / Nov. 01  
4

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