Datasheet > HY5V26FLF-7

HY5V26FLF-7

更新时间： 2023-02-26 14:26:17

品牌	Logo	应用领域
海力士 - HYNIX		动态存储器
页数	文件大小	规格书
12页	157K
描述
Synchronous DRAM, 8MX16, 5.4ns, CMOS, PBGA54, 8 X 8 MM, 0.80 MM PITCH, FBGA-54

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HY5V26FLF-7 数据手册

Synchronous DRAM Memory 128Mbit (8Mx16bit)

HY5V26F(L)F(P)-x(I) Series

CAPACITANCE (f=1MHz, VDD=3.3V)

Parameter

Symbol

Min

Max

Unit

CLK

CI1

2.0

4.0

Input capacitance

A0 ~ A11, BA0, BA1, CKE, CS, RAS, CAS,

WE, LDQM, UDQM

CI2

2.0

3.0

4.0

5.5

Data input / output capacitance

DQ0 ~ DQ15

CI/O

DC CHARACTERISTICS I

Parameter

Symbol

Min

Max

Unit

Note

Input Leakage Current

Output Leakage Current

Output High Voltage

Output Low Voltage

ILI

ILO

-1

2.4

VOH

VOL

IOH = -2mA

0.4

IOL = +2mA

Notes:

1. VIN = 0 to 3.3V, All other balls are not tested under VIN =0V

2. DOUT is disabled, VOUT=0 to 3.6

Rev. 1.0 / June. 2007

1...4 5 678 9 10...12

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