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HT45R34(20DIP-A) PDF预览

HT45R34(20DIP-A)

更新时间: 2024-01-16 22:56:27
品牌 Logo 应用领域
台湾合泰/盛群 - HOLTEK 微控制器
页数 文件大小 规格书
41页 287K
描述
Microcontroller

HT45R34(20DIP-A) 技术参数

生命周期:Contact ManufacturerReach Compliance Code:unknown
风险等级:5.8Base Number Matches:1

HT45R34(20DIP-A) 数据手册

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HT45R34  
Functional Description  
Execution Flow  
incremented by one. The program counter then points to  
the memory word containing the next instruction code.  
The system clock for the microcontroller is derived from  
either a crystal or an RC oscillator. The system clock is  
internally divided into four non-overlapping clocks. One  
instruction cycle consists of four system clock cycles.  
When executing a jump instruction, a conditional skip  
execution, loading the PCL register, a subroutine call,  
an initial reset, an internal interrupt, an external interrupt  
or return from a subroutine, the PC manipulates the pro-  
gram transfer by loading the address corresponding to  
each instruction.  
Instruction fetching and execution are pipelined in such  
a way that a fetch takes an instruction cycle while de-  
coding and execution takes the next instruction cycle.  
However, the pipelining scheme causes each instruc-  
tion to effectively execute in a cycle. If an instruction  
changes the program counter, two cycles are required to  
complete the instruction.  
The conditional skip is activated by instructions. Once  
the condition is met, the next instruction, fetched during  
the current instruction execution, is discarded and a  
dummy cycle replaces it to get the proper instruction.  
Otherwise the program will proceed with the next in-  
struction.  
Program Counter - PC  
The program counter, PC controls the sequence in  
which the instructions stored in program ROM are exe-  
cuted and its contents specify full range of program  
memory.  
The lower byte of the program counter, PCL is a read-  
able and writable register. Moving data into the PCL per-  
forms a short jump. The destination must be within the  
current Program Memory Page.  
After accessing a program memory word to fetch an in-  
struction code, the contents of the program counter are  
When a control transfer takes place, an additional  
dummy cycle is required.  
T
1
T
2
T
3
T
4
T
1
T
2
T
3
T
4
T
1
T
2
T
3
T
4
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P
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1
P
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2
P
C
F
e
t
c
h
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(
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E
x
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1
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F
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x
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Execution Flow  
Program Counter  
Mode  
*9  
0
*8  
0
*7  
0
*6  
0
*5  
0
*4  
0
*3  
0
*2  
0
*1  
0
*0  
0
Initial Reset  
External Interrupt 0  
External Interrupt 1  
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
Timer/Event Counter Overflow  
0
0
0
0
0
0
1
1
0
0
External RC Oscillation Converter Interrupt  
Skip  
0
0
0
0
0
1
0
0
0
0
Program Counter+2  
Loading PCL  
*9  
*8  
#8  
S8  
@7  
#7  
@6  
#6  
@5  
#5  
@4  
#4  
@3  
#3  
@2  
#2  
@1  
#1  
@0  
#0  
Jump, Call Branch  
#9  
S9  
Return from Subroutine  
S7  
S6  
S5  
S4  
S3  
S2  
S1  
S0  
Program Counter  
Note: *9~*0: Program Counter bits  
#9~#0: Instruction code bits  
S9~S0: Stack register bits  
@7~@0: PCL bits  
Rev. 1.20  
5
October 15, 2007  

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