3ꢅ-Bit Aꢂꢀ® Coꢂtex®-M3 MCU
HT3ꢅF1ꢅ365/HT3ꢅF1ꢅ366/HT3ꢅFꢅꢅ366
List of Figures
Figuꢂe 1. Block Diagꢂaꢀ ......................................................................................................................... 19
Figuꢂe ꢅ. Meꢀoꢂy Map............................................................................................................................ ꢅ0
Figuꢂe 3. Clock Stꢂuctuꢂe........................................................................................................................ ꢅ3
Figuꢂe 4. 46-pin QF� Pin Assignꢀent ................................................................................................... ꢅ4
Figuꢂe 5. 48-pin LQFP Pin Assignꢀent................................................................................................... ꢅ5
Figuꢂe 6. 64-pin LQFP Assignꢀent......................................................................................................... ꢅ6
Figuꢂe ꢃ. 100-pin LQFP Assignꢀent....................................................................................................... ꢅꢃ
Figuꢂe 8. ADC Saꢀpling �etwoꢂk Model ................................................................................................ 4ꢅ
Figuꢂe 9. IꢅC Tiꢀing Diagꢂaꢀs................................................................................................................ 44
Figuꢂe 10. SPI Tiꢀing Diagꢂaꢀs – SPI Masteꢂ Mode............................................................................. 45
Figuꢂe 11. SPI Tiꢀing Diagꢂaꢀs – SPI Slave Mode with CPHA=1......................................................... 46
Figuꢂe 1ꢅ. Tiꢀing of IꢅS Masteꢂ Mode .................................................................................................... 4ꢃ
Figuꢂe 13. Tiꢀing of IꢅS Slave Mode ...................................................................................................... 4ꢃ
Figuꢂe 14. SDIO Default Mode ............................................................................................................... 48
Figuꢂe 15. SDIO High-speed Mode ........................................................................................................ 49
Figuꢂe 16. USB Signal Rise Tiꢀe and Fall Tiꢀe and Cꢂoss-Point Voltage (VCRS) Definition .................. 50
Rev. 1.00
5 of 56
�oveꢀꢁeꢂ 0ꢃꢄ ꢅ01ꢃ