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HMU16GC-35 PDF预览

HMU16GC-35

更新时间： 2024-02-27 22:46:45
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
13页 276K
描述
16 x 16-Bit CMOS Parallel Multipliers

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HMU16GC-35 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：PGA, PGA68,11X11Reach Compliance Code：unknown
风险等级：5.71其他特性：2 X 16 BIT DATA INPUT BUS; MULTIPLEXED OUTPUT; ICC SPECIFIED @ 1MHZ
边界扫描：NO外部数据总线宽度：16
JESD-30 代码：S-CPGA-P68JESD-609代码：e0
低功率模式：NO端子数量：68
最高工作温度：70 °C最低工作温度：
输出数据总线宽度：32封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：PGA封装等效代码：PGA68,11X11
封装形状：SQUARE封装形式：GRID ARRAY
电源：5 V认证状态：Not Qualified
子类别：DSP Peripherals最大压摆率：7 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：PIN/PEG
端子节距：2.54 mm端子位置：PERPENDICULAR
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, MULTIPLIERBase Number Matches：1

HMU16GC-35 数据手册

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HMU16, HMU17  
TM  
Data Sheet  
November 1999  
File Number 2803.4  
16 x 16-Bit CMOS Parallel Multipliers  
Features  
itle  
MU  
,
The HMU16 and HMU17 are high speed, low power CMOS  
16-bit x 16-bit multipliers ideal for fast, real time digital signal  
processing applications.  
• 16 x 16-Bit Parallel Multiplier with Full 32-Bit Product  
• High-Speed (35ns) Clocked Multiply Time  
• Low Power Operation  
U1  
The X and Y operands along with their mode controls (TCX  
and TCY) have 17-bit input registers. The mode controls  
independently specify the operands as either two’s  
complement or unsigned magnitude format, thereby allowing  
mixed mode multiplication operations.  
- I  
- I  
= 500µA Maximum  
= 7.0mA Maximum at 1MHz  
CCSB  
CCOP  
b-  
t
x
• Supports Two’s Complement, Unsigned Magnitude and  
Mixed Mode Multiplication  
• HMU16 is Compatible with the AM29516, LMU16,  
IDT7216 and the CY7C516  
-Bit  
OS  
ral-  
Two 16-bit output registers are provided to hold the most and  
least significant halves of the result (MSP and LSP). For  
asynchronous output, these registers may be made  
transparent through the use of the Feedthrough Control  
(FT).  
• HMU17 is Compatible with the AM29517, LMU17,  
IDT7217 and the CY7C517  
• TTL Compatible Inputs/Outputs  
• Three-State Outputs  
lti-  
ers)  
utho  
)
ey-  
rds  
ter-  
Additional inputs are provided for format adjustment and  
rounding. The Format Adjust control (FA) allows the user to  
select either a left shifted 31-bit product or a full 32-bit  
product, whereas the round control (RND) provides the  
capability of rounding the most significant portion of the  
result.  
Applications  
• Fast Fourier Transform Analysis  
• Digital Filtering  
The HMU16 has independent clocks (CLKX, CLKY, CLKL,  
CLKM) associated with each of these registers to maximize  
throughput and simplify bus interfacing. The HMU17 has  
only a single clock input (CLK), but makes use of three  
register enables (ENX, ENY and ENP). The ENX and ENY  
inputs control the X and Y Input Registers, while ENP  
controls both the MSP and LSP Output Registers. This  
configuration facilitates the use of the HMU17 for  
microprogrammed systems.  
• Graphic Display Systems  
• Image Processing  
rpo-  
ion,  
i-  
n-  
ctor,  
ral-  
• Radar and Sonar  
• Speech Synthesis and Recognition  
Ordering Information  
TEMP.  
PKG.  
NO.  
o
PART NUMBER  
HMU16JC-35  
HMU16JC-45  
HMU16GC-35  
HMU16GC-45  
HMU17JC-35  
HMU17JC-45  
HMU17GC-35  
HMU17GC-45  
RANGE ( C)  
PACKAGE  
68 Ld PLCC  
68 Ld PLCC  
68 Ld CPGA  
68 Ld CPGA  
68 Ld PLCC  
68 Ld PLCC  
68 Ld CPGA  
68 Ld CPGA  
The two halves of the product may be routed to a single  
16-bit three-state output port via a multiplexer, and in  
addition, the LSP is connected to the Y-input port through a  
separate three-state buffer.  
lti-  
er,  
C,  
gi-  
,
P,  
e-  
l
0 to 70  
N68.95  
N68.95  
G68.B  
G68.B  
N68.95  
N68.95  
G68.B  
G68.B  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
nc-  
n,  
0 to 70  
se-  
nd,  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2001, All Rights Reserved  
1
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