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HMU17

更新时间: 2024-09-22 22:48:35
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英特矽尔 - INTERSIL /
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6页 202K
描述
16 x 16-Bit CMOS Parallel Multiplier

HMU17 数据手册

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HMU17/883  
16 x 16-Bit CMOS Parallel Multiplier  
October 1997  
Features  
Description  
The HMU17/883 is a high speed, low power CMOS 16 x 16-bit  
parallel multiplier ideal for fast, real time digital signal processing  
applications. The 16-bit X and Y operands may be independently  
specified as either two’s complement or unsigned magnitude for-  
mat, thereby allowing mixed mode multiplication operations.  
• This Circuit is Processed in Accordance to MIL-STD-  
883 and is Fully Conformant Under the Provisions of  
Paragraph 1.2.1.  
• 16 x 16-Bit Parallel Multiplier with Full 32-Bit Product  
• High-Speed (45ns) Clocked Multiply Time  
• Low Power CMOS Operation  
Additional inputs are provided to accommodate format adjust-  
ment and rounding of the 32-bit product. The Format Adjust con-  
trol allows the user the option of selecting a 31-bit product with  
the sign bit replicated LSP. The Round control is provided to  
accommodate rounding of the most significant portion of the  
result. This is accomplished by adding one to the most signifi-  
cant bit of the LSP.  
- I  
- I  
= 500µA Maximum  
CCSB  
CCOP  
= 7.0mA Maximum at 1MHz  
• HMU17/883 is Compatible with the AM29517, LMU17,  
IDT7217, and the CY7C517  
Two 16-bit output registers (MSP and LSP) are provided to hold  
the most and least significant portions of the result, respectively.  
These registers may be made transparent for asynchronous  
operation through the use of the Feedthrough Control (FT). The  
two halves of the product may be routed to a single 16-bit three-  
state output port via the output multiplexer control, and in addi-  
tion, the LSP is connected to the Y-input port through a separate  
three-state buffer.  
• Supports Two’s Complement, Unsigned Magnitude  
and Mixed Mode Multiplication  
• TTL Compatible Inputs/Outputs  
- Three-State Output  
Ordering Information  
The HMU17/883 utilizes a single clock signal (CLK) along with  
three register enables (ENX, ENY, and ENP) to latch the input  
operands and the output product registers. The ENX and ENY  
inputs enable the X and Y input registers, while ENP enables both  
the LSP and MSP output registers. This configuration facilitates  
the use of the HMU17/883 for micro-programmed systems.  
TEMP.  
PKG.  
NO.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
-55 to 125 68 Ld PGA  
-55 to 125 68 Ld PGA  
HMU17GM-45/883  
HMU17GM-60/883  
All outputs of the HMU17/883 also offer three-state control for  
multiplexing onto multiuse system busses.  
Functional Block Diagram  
X0-15 TCX  
RND  
TCY Y0-15/P0-15  
REGISTER  
REGISTER  
REGISTER  
OEL  
CLK  
ENX  
ENY  
MULTIPLIER ARRAY  
FA  
FT  
FORMAT ADJUST  
MSP LSP  
REGISTER REGISTER  
ENP  
MULTIPLEXER  
MSPSEL  
OEP  
P16-31/P0-15  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2805.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
3-36  

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