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HMS97C7134 PDF预览

HMS97C7134

更新时间: 2024-02-22 13:37:37
品牌 Logo 应用领域
其他 - ETC 显示器外围集成电路光电二极管微控制器可编程只读存储器时钟
页数 文件大小 规格书
86页 1354K
描述
[Monitor]

HMS97C7134 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP40,.6针数:40
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.84Is Samacsys:N
具有ADC:YES地址总线宽度:
位大小:8CPU系列:8051
最大时钟频率:16 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:R-PDIP-T40长度:52.324 mm
I/O 线路数量:30端子数量:40
最高工作温度:70 °C最低工作温度:
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP40,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V认证状态:Not Qualified
RAM(字节):512ROM(单词):32768
ROM可编程性:OTPROM座面最大高度:5.08 mm
速度:16 MHz子类别:Microcontrollers
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:15.24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

HMS97C7134 数据手册

 浏览型号HMS97C7134的Datasheet PDF文件第2页浏览型号HMS97C7134的Datasheet PDF文件第3页浏览型号HMS97C7134的Datasheet PDF文件第4页浏览型号HMS97C7134的Datasheet PDF文件第5页浏览型号HMS97C7134的Datasheet PDF文件第6页浏览型号HMS97C7134的Datasheet PDF文件第7页 
HMS91C7134  
HMS91C7134  
CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER  
FOR MONITOR  
1. OVERVIEW  
1.1 Description  
The HMS9xC7134 is a single-chip microcontroller of the 80C51 family, which is dedicated for monitor application. It is particularly suit-  
able for multi-sync computer monitor controller. This contains DDC interfaces to the PC host, sync-detector and sync-processor for auto-  
2
sync application, ADC, static PWM, dynamic PWM and I C bus interface for control of the video and deflection functions of the monitor.  
RAM  
Size  
Device name  
ROM Size  
I/O  
OTP  
Package  
32K bytes  
Mask ROM  
30(42DIP)  
32(42SDIP)  
40DIP(HMS91C7134),  
42SDIP(HMS91C7134K)  
HMS91C7134  
512 bytes  
HMS97C7134  
1.2 Features  
• 80C51 core  
- Separate input for a SOG signal  
- Missing pulse insertion option  
- HSYNC/ VSYNC change interrupt  
• 32K bytes of ROM for HMS91C7134  
(32K bytes of EPROM for HMS97C7134)  
• 256 bytes of RAM and 256 bytes of XRAM for  
DDC operation  
• One multi-master/slave I2C interface (up to  
400K bit/s) for control of other system IC’s  
• Uses an external crystal of 12.0 MHz  
• One DDC compliant interface :  
• Eight 8-bit Static PWM outputs for digital con-  
trol applications  
• Two 8-bit Dynamic PWM outputs for various  
waveform generation  
Fully supports DDC1 with dedicated hardware  
-
- DDC2B, DDC2AB and DDC2B+ compliant dedi-  
• One 8-bit ADC with 4 input channels  
• LED driver port ; two port lines with  
15 mA drive capability  
2
cated hardware based on an I C bus interface  
- RAM buffer with programmable size, 128 bytes  
or 256 bytes, which can be used for DDC opera-  
tion or shared as system RAM  
• One 8-bit port only for I/O function  
• On-chip sync processor  
• 24 derivative I/O ports configurable for alterna-  
tive functions  
HSYNC frequency with 12-bit resolution  
-
• Watchdog timer (524ms max.)  
- VSYNC frequency with 12-bit resolution  
- HSYNC and VSYNC polarity  
- HSYNC and VSYNC presence detection  
- Composite sync separation  
- Free running sync. generation  
- Clamping pulse output  
• On-chip low VDD voltage detect and reset  
(reset period: 524ms)  
• Operating temperature : 0 to 70  
• Special idle and power-down modes with low  
power consumption  
• Single power supply : 4.5V to 5.5V  
- Pattern generation  
November.2001 ver1.0  
1

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