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HM62W16255HCLTT-10 PDF预览

HM62W16255HCLTT-10

更新时间: 2024-09-24 22:30:59
品牌 Logo 应用领域
日立 - HITACHI 静态存储器
页数 文件大小 规格书
18页 94K
描述
4M High Speed SRAM (256-kword x 16-bit)

HM62W16255HCLTT-10 数据手册

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HM62W16255HC Series  
4M High Speed SRAM (256-kword × 16-bit)  
ADE-203-1200 (Z)  
Preliminary  
Rev. 0.0  
Sep. 1, 2000  
Description  
The HM62W16255HC is a 4-Mbit high speed static RAM organized 256-kword × 16-bit. It has realized high  
speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing  
technology. It is most appropriate for the application which requires high speed, high density memory and  
wide bit width configuration, such as cache and buffer memory in system. The HM62W16255HC is  
packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.  
Features  
Single 3.3 V supply: 3.3 V ± 0.3 V  
Access time: 10 ns (max)  
Completely static memory  
No clock or timing strobe required  
Equal access and cycle times  
Directly TTL compatible  
All inputs and outputs  
Operating current: 145 mA (max)  
TTL standby current: 40 mA (max)  
CMOS standby current: 5 mA (max)  
: 1 mA (max) (L-version)  
Data retention current: 0.6 mA (max) (L-version)  
Data retention voltage: 2.0 V (min) (L-version)  
Center VCC and VSS type pinout  
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest  
Hitachi’s Sales Dept. regarding specification.  

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