Datasheet > HM62W16255HLTT-15

HM62W16255HLTT-15

更新时间： 2024-09-24 22:18:15

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HM62W16255HLTT-15 数据手册

HM62W16255H Series

4M High Speed SRAM (256-kword × 16-bit)

ADE-203-751D (Z)

Rev. 1.0

Sep. 15, 1998

Description

The HM62W16255H is a 4-Mbit high speed static RAM organized 256-kword × 16-bit. It has realized high

speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high speed

circuit designing technology. It is most appropriate for the application which requires high speed, high

density memory and wide bit width configuration, such as cache and buffer memory in system. The

HM62W16255H is packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density

surface mounting.

Features

•

Single 3.3 V supply: 3.3 V ± 0.3V

Access time: 12/15 ns (max)

Completely static memory

No clock or timing strobe required

Equal access and cycle times

Directly TTL compatible

•

All inputs and outputs

•

Operating current: 180/160 mA (max)

TTL standby current: 60/50 mA (max)

CMOS standby current: 5 mA (max)

: 1mA (max) (L-version)

•

Data retension current: 0.6 mA (max) (L-version)

Data retension voltage: 2.0 V (min) (L-version)

Center V_CCand V_SStype pinout

12 3 4 5 6 7...17

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型号	品牌	获取价格	描述	数据表
HM62W16255HTT-12	HITACHI	获取价格	4M High Speed SRAM (256-kword x 16-bit)
HM62W16255HTT-15	HITACHI	获取价格	4M High Speed SRAM (256-kword x 16-bit)
HM62W16255HTTI-15	HITACHI	获取价格	4M High Speed SRAM (256-kword x 16-bit)
HM62W16256B	HITACHI	获取价格	4 M SRAM (256-kword x 16-bit)
HM62W16256B	RENESAS	获取价格	4 M SRAM (256-kword ´ 16-bit)
HM62W16256BLBT-5	HITACHI	获取价格	Standard SRAM, 256KX16, 55ns, CMOS, PBGA48, 0.75 MM PITCH, CSP-48
HM62W16256BLBT-5SL	HITACHI	获取价格	Standard SRAM, 256KX16, 55ns, CMOS, PBGA48, 0.75 MM PITCH, CSP-48
HM62W16256BLBT-7SL	HITACHI	获取价格	Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 0.75 MM PITCH, CSP-48
HM62W16256BLTT-5	RENESAS	获取价格	4 M SRAM (256-kword ´ 16-bit)
HM62W16256BLTT-5	HITACHI	获取价格	4 M SRAM (256-kword x 16-bit)