®
HI3304
November 2002
4-Bit, 25 MSPS, Flash A/D Converter
Features
Description
• CMOS Low Power (Typ) . . . . . . . . . . . . . . . . . . . 35mW
The Intersil HI3304 is a CMOS parallel (FLASH) analog-to-
digital converter designed for applications demanding both
low-power consumption and high speed digitization. Digitiz-
ing at 25MHz, for example, requires only about 35mW.
• Parallel Conversion Technique
• Single Power Supply Voltage . . . . . . . . . . . . 3V to 7.5V
• Sampling Rate at 5V Supply . . . . . . . . . . . . . . . . . 25MHz
The HI3304 operates over a wide, full-scale signal input volt-
age range of 0.5V up to the supply voltage. Power consump-
tion is as low as 10mW, depending upon the clock frequency
selected.
• 4-Bit Latched Three-State Output with Overflow and
Data Change Outputs
1
• Maximum Nonlinearity. . . . . . . . . . . . . . . . . . . . / LSB
8
• Inherent Resistance to Latch-Up
Sixteen paralleled auto-balanced voltage comparators mea-
sure the input voltage with respect to a known reference to
produce the parallel-bit outputs in the HI3304. Fifteen com-
parators are required to quantize all input voltage levels in
this 4-bit converter, and the additional comparator is
required for the overflow bit. A data change pin indicates
when the present output differs from the previous, thus
allowing compaction of data storage.
• Bipolar Input Range with Optional Second Supply
• Input Bandwidth (Typ). . . . . . . . . . . . . . . . . . . . . 40MHz
• Linearity (INL, DNL):
- HI3304JIP . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.25 LSB
- HI3304JIB . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.25 LSB
• Sampling Rate:
Part Number Information
- HI3304JIP . . . . . . . . . . . . . . . . . . . . . . . .25MHz (40ns)
- HI3304JIB . . . . . . . . . . . . . . . . . . . . . . . .25MHz (40ns)
TEMP.
o
PART NUMBER RANGE ( C)
PACKAGE
16 Ld PDIP
16 Ld SOIC
PKG. NO.
E16.3
Applications
• Video Digitizing
HI3304JIP
HI3304JIB
-40 to 85
-40 to 85
M16.3
• High Speed Data Acquisition
• Digital Communication Systems
• Radar Signal Processing
Pinout
HI3304
(PDIP, SOIC)
TOP VIEW
BIT 1 (LSB)
1
2
3
4
5
6
7
8
16 V
DD
BIT 2
BIT 3
15 CLK
14 V
13 V
12 V
11 V
10 V
-
AA
BIT 4
-
REF
REF
IN
DATA CHANGE (DC)
OVERFLOW (OF)
CE2
+
+
AA
V
9 CE1
SS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
FN4137.2
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Copyright © Intersil Americas Inc. 2002. All Rights Reserved
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