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HI-6110PQT PDF预览

HI-6110PQT

更新时间： 2024-09-29 04:21:47
品牌 Logo 应用领域
HOLTIC /
页数 文件大小 规格书
36页 512K
描述
MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor

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中文翻译

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HI-6110PQT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：QFP
包装说明：LQFP, QFP52,.52SQ针数：52
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
地址总线宽度：边界扫描：NO
最大时钟频率：24 MHz通信协议：MIL STD 1553B
数据编码/解码方法：BIPH-LEVEL(MANCHESTER)最大数据传输速率：0.125 MBps
外部数据总线宽度：16JESD-30 代码：S-PQFP-G52
JESD-609代码：e0长度：10 mm
低功率模式：NO湿度敏感等级：3
串行 I/O 数：2端子数量：52
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：LQFP
封装等效代码：QFP52,.52SQ封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE峰值回流温度（摄氏度）：240
电源：3.3 V认证状态：Not Qualified
座面最大高度：1.6 mm子类别：Serial IO/Communication Controllers
最大压摆率：800 mA最大供电电压：3.45 V
最小供电电压：3.15 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：10 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
Base Number Matches：1

HI-6110PQT 数据手册

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HI-6110  
MIL-STD-1553 / MIL-STD-1760  
BC / RT / MT Message Processor  
November 2006  
GENERALDESCRIPTION  
FEATURES  
The HI-6110 is a CMOS integrated circuit implementing the  
MIL-STD-1553 (1553) data communications protocol  
between a host processor and a dual redundant 1553 data  
bus. The single chip architecture has a digital section  
containing all necessary logic and memory to process and  
store the command and data words for one complete 1553  
message. The analog section includes dual transceivers  
coupled to the 1553 buses through external current mode  
transformers. The device is available in an industry  
standard 64-pin 9 mm square LPCC package, making it the  
smallest dual redundant 1553 interface product on the  
market.  
• Monolithic CMOS technology  
• 3.3V operation  
• Exceptionally low power  
• On-chip message buffering  
• Selectable master clock frequency  
• Dual differential 1553 bus transceivers  
• Bus Controller / Remote Terminal /  
Monitor Terminal operating modes  
• Compliant to MIL-STD-1553B Notice 2  
and MIL-STD-1760 Stores Management  
APPLICATIONS  
The HI-6110 may be configured as a Bus Controller (BC), a  
Remote Terminal (RT), a Monitor Terminal (MT), or a  
Monitor Terminal with assigned RTaddress. 16-bit registers  
store incoming and outgoing Command, Status and Data  
words. Using two 32-word data FIFOs, the HI-6110 can  
store the maximum number of 1553 words occurring in any  
message. For messages with transmitted data words, data  
may be written in advance or on-the-fly. Received data can  
be retrieved on-the-fly or all at once after the Valid Message  
flag is asserted.  
• MIL-STD-1553 Terminals  
• Flight Control and Monitoring  
• ECCM Interfaces  
• Stores Management  
• Test Equipment  
• Sensor Interfaces  
• Instrumentation  
PIN CONFIGURATION (Top View)  
BC message sequences are initiated by a rising edge on  
the BCSTART input, or a 0 to 1 transition at the BCSTART  
bit in the Control Register. All RT command responses are  
automatically initiated after a valid Command Word is  
received.  
Each bus has a dedicated Manchester encoder and analog  
transformer driver. Each driver dissipates less than 200  
mW of on-chip power at 100% duty cycle.  
R/W -  
CS -  
D0 -  
D1 -  
D2 -  
D3 -  
D4 -  
D5 -  
D6 -  
D7 - 10  
D8 - 11  
D9 - 12  
D10 - 13  
1
2
3
4
5
6
7
8
9
39 - VDDA  
38 - BUSA  
37 - BUSB  
36 - VDDB  
35 - BUSB  
34 - TXINHB  
33 - RCVB  
32 - FFEMPTY  
31 - RF0 / RCVCMDA  
30 - RF1 / RCVCMDB  
29 - RFLAG  
HI-6110PQI  
&
HI-6110PQT  
Each bus receiver has a dedicated Manchester decoder. In  
BC mode, a RCV signal indicates when valid 1553 words  
are received. In RT/MT modes, RCV indicates a valid  
command received, while the 1553 command decoder  
updates a Message register so the external controller can  
identify command type and respond appropriately.  
Guaranteed by design, the HI-6110 cannot generate  
messages exceeding 660uS, the duration of a Command or  
Status Word plus 32 contiguous data words.  
28 - VALMESS  
27 - ERROR  
The external host controller reads and writes a simplified  
register structure in the HI-6110 over a 16-bit parallel bus.  
The system designer has flexibility over many aspects of  
configuration. Control and status monitoring can be done in  
hardware (by reading/writing control pins) or in software (by  
reading/writing register bits).  
52 Pin Plastic Quad Flat Pack (PQFP)  
See page 35 for 64-Pin LPCC Pin Configuration  
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
(DS6110 Rev. F)  
11/06  
1234567...36

中文翻译

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