Contents
1
Introduction.................................................................................................................9
1.1
Terminology .......................................................................................................9
1.1.1 Processor Packaging Terminology............................................................. 10
References ....................................................................................................... 11
1.2
2
Electrical Specifications ............................................................................................... 13
2.1
2.2
Power and Ground Lands.................................................................................... 13
Decoupling Guidelines........................................................................................ 13
2.2.1 VCC Decoupling ..................................................................................... 13
2.2.2 VTT Decoupling...................................................................................... 14
2.2.3 FSB Decoupling...................................................................................... 14
Voltage Identification......................................................................................... 14
Reserved, Unused, and TESTHI Signals ................................................................ 16
Voltage and Current Specification........................................................................ 17
2.5.1 Absolute Maximum and Minimum Ratings .................................................. 17
2.5.2 DC Voltage and Current Specification........................................................ 18
2.5.3 VCC Overshoot ...................................................................................... 21
2.5.4 Die Voltage Validation............................................................................. 22
Signaling Specifications...................................................................................... 22
2.6.1 FSB Signal Groups.................................................................................. 23
2.6.2 GTL+ Asynchronous Signals..................................................................... 25
2.6.3 Processor DC Specifications ..................................................................... 25
2.6.3.1 GTL+ Front Side Bus Specifications ............................................. 28
Clock Specifications........................................................................................... 29
2.7.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking............................ 29
2.7.2 FSB Frequency Select Signals (BSEL[2:0])................................................. 30
2.7.3 Phase Lock Loop (PLL) and Filter .............................................................. 30
2.7.4 BCLK[1:0] Specifications......................................................................... 32
2.3
2.4
2.5
2.6
2.7
3
Package Mechanical Specifications ................................................................................ 33
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Package Mechanical Drawing............................................................................... 33
Processor Component Keep-Out Zones................................................................. 37
Package Loading Specifications ........................................................................... 37
Package Handling Guidelines............................................................................... 37
Package Insertion Specifications.......................................................................... 38
Processor Mass Specification............................................................................... 38
Processor Materials............................................................................................ 38
Processor Markings............................................................................................ 38
Processor Land Coordinates................................................................................ 39
4
5
Land Listing and Signal Descriptions ............................................................................. 41
4.1
4.2
Processor Land Assignments............................................................................... 41
Alphabetical Signals Reference............................................................................ 64
Thermal Specifications and Design Considerations........................................................... 75
5.1
Processor Thermal Specifications......................................................................... 75
5.1.1 Thermal Specifications ............................................................................ 75
5.1.2 Thermal Metrology ................................................................................. 79
Processor Thermal Features................................................................................ 79
5.2.1 Thermal Monitor..................................................................................... 79
5.2.2 On-Demand Mode .................................................................................. 80
5.2.3 PROCHOT# Signal.................................................................................. 81
5.2.4 THERMTRIP# Signal ............................................................................... 81
5.2
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