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HFBR-5963LZ PDF预览

HFBR-5963LZ

更新时间: 2024-01-03 12:03:59
品牌 Logo 应用领域
安华高科 - AVAGO 光纤输出元件异步传输模式放大器以太网ATM通信
页数 文件大小 规格书
13页 166K
描述
Multimode Small Form Factor Transceivers for ATM, FDDI, Fast Ethernet and SONET OC-3

HFBR-5963LZ 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:ROHS COMPLIANT, PLASTICReach Compliance Code:compliant
ECCN代码:5A991.B.5.AHTS代码:8517.62.00.50
风险等级:5.72其他特性:2 X 5 ARRAY, OPTICAL OUTPUT POWER FOR THIS 62.5/125 FIBER TYPE: 0.026MW
主体宽度:13.59 mm主体高度:9.8 mm
主体长度或直径:48.19 mm内置特性:AMPLIFIER
通信标准:ATM, OC-3, SDH, SONET, STM-1连接类型:LC CONNECTOR
发射极/检测器类型:PIN PHOTODIODE光纤设备类型:TRANSCEIVER
光纤类型:50/125, 62.5/125, MMFJESD-609代码:e3
安装特点:SURFACE MOUNT最高工作温度:70 °C
最低工作温度:最大工作波长:1380 nm
最小工作波长:1270 nm标称工作波长:1308 nm
标称光功率输出:0.014 mW子类别:Fiber Optic Transceivers
最大供电电压:3.63 V最小供电电压:2.97 V
标称供电电压:3.3 V表面贴装:YES
端子面层:Tin (Sn)Base Number Matches:1

HFBR-5963LZ 数据手册

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Transmitter Section  
Package  
The transmitter section of the HFBR-5963xxZ utilizes a The overall package concept for the Avago transceiver  
1300 nm InGaAsP LED. This LED is packaged in the optical consists of three basic elements; the two optical subas-  
subassembly portion of the transmitter section. It is semblies, an electrical subassembly, and the housing as  
driven by a custom silicon IC which converts differential illustrated in the block diagram in Figure 1.  
PECL logic signals, ECL referenced (shifted) to a +3.3 V  
The package outline drawing and pin out are shown in  
supply, into an analog LED drive current.  
Figures 2 and 5. The details of this package outline and  
pin out are compliant with the multisource definition of  
the 2 x 5 DIP. The low profile of the Avago transceiver  
Receiver Section  
The receiver section of the HFBR-5963xxZ utilizes an  
InGaAs PIN photodiode coupled to a custom silicon tran-  
simpedance preamplifier IC. It is packaged in the optical  
subassembly portion of the receiver.  
design complies with the maximum height allowed for  
the LC connector over the entire length of the package.  
The optical subassemblies utilize a high-volume assembly  
process together with low-cost lens elements which result  
in a cost- effective building block.  
This PIN/preamplifier combination is coupled to a custom  
quantizer IC which provides the final pulse shaping for  
the logic output and the signal detect function. The data  
output is differential. The data output is PECL compat-  
ible, ECL referenced (shifted) to a +3.3 V power supply.  
The receiver outputs, data output and data out bar, are  
squelched at signal detect deassert. The signal detect  
output is single ended. The signal detect circuit works by  
sensing the level of the received signal and comparing  
this level to a reference. The SD output is +3.3 V TTL.  
The electrical subassembly consists of a high volume mul-  
tilayer printed circuit board on which the ICs and various  
surface-mounted passive circuit elements are attached.  
The receiver section includes an internal shield for the elec-  
trical and optical subassemblies to ensure high immunity  
to external EMI fields.  
The outer housing including the LC ports is molded of filled  
nonconductive plastic to provide mechanical strength.  
The solder posts of the Avago design are isolated from the  
internal circuit of the transceiver.  
The transceiver is attached to a printed circuit board  
with the ten signal pins and the two solder posts which  
exit the bottom of the housing. The two solder posts  
provide the primary mechanical strength to withstand the  
loads imposed on the transceiver by mating with the LC  
connector fiber cables.  
R X SUPPLY  
DATA OUT  
QUANTIZER IC  
DATA OUT  
PIN PHOTODIODE  
PRE-AMPLIFIER  
SUBASSEMBLY  
R X GROUND  
TX GROUND  
SIGNAL  
DETECT  
LC  
RECEPTACLE  
LED  
OPTICAL  
SUBASSEMBLY  
DATA IN  
LED DRIVER IC  
DATA IN  
TX SUPPLY  
Figure 1. Block Diagram  
2

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