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HFBR-5208XXXZ PDF预览

HFBR-5208XXXZ

更新时间： 2022-06-24 15:40:43
品牌 Logo 应用领域
安华高科 - AVAGO ATM异步传输模式
页数 文件大小 规格书
17页 237K
描述
1 x 9 Fiber Optic Transceivers for 622 Mb/s ATM/SONET/SDH Applications

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HFBR-5208XXXZ 数据手册

 浏览型号HFBR-5208XXXZ的Datasheet PDF文件第2页浏览型号HFBR-5208XXXZ的Datasheet PDF文件第3页浏览型号HFBR-5208XXXZ的Datasheet PDF文件第4页浏览型号HFBR-5208XXXZ的Datasheet PDF文件第6页浏览型号HFBR-5208XXXZ的Datasheet PDF文件第7页浏览型号HFBR-5208XXXZ的Datasheet PDF文件第8页 
Reference Design  
Operation in -5.2 V Designs  
Avago has developed a reference design for multimode  
ATM-SONET/SDH applications shown in Figure 6. This ref-  
erence design uses aVitesse Semiconductor Inc.’sVSC8117  
clock recovery/clock generation/serializer/deserializer  
integrated circuit and a PMC-Sierra Inc. PM5355 framer  
IC. Application Note 1178 documents the design, layout,  
testing and performance of this reference design. Gerber  
files, schematic and application note are available from  
the Avago Fiber-Optics Components’web site at the URL  
of http://www.avagotech.com.  
For applications that require -5.2 V dc power supply level  
for true ECL logic circuits, the HFBR-5208xxxZ transceiver  
can be operated with a V = 0 V dc and a V = -5.2 V dc.  
CC  
EE  
This transceiver is not specified with an operating, nega-  
tive power supply voltage. The potential compromises  
that can occur with use of -5.2 V dc power are that the  
absolute voltage states for V and V will be changed  
OH  
OL  
slightly due to the 0.2 V difference in supply levels. Also,  
noise immunity may be compromised for the HFBR-  
5208xxxZ trans-ceiver because the ground plane is now  
the V supply point. The suggested power supply filter  
CC  
circuit shown in the Recommended Circuit Schematic  
figure should be located in theV paths at the transceiver  
EE  
supply pins. Direct coupling of the differential data signal  
can be done between the HFBR-5208xxxZ transceiver  
and the standard ECL circuits. For guaranteed -5.2 V dc  
operation, contact your local Avago Component Field  
Sales Engineer for assistance.  
2 x Ø 1.9 0.1  
(0.075 0.004)  
20.32  
(0.800)  
9 x Ø 0.8 0.1  
(0.032 0.004)  
20.32  
(0.800)  
2.54  
(0.100)  
TOP VIEW  
DIM EN S IO N S A RE IN M ILLIM ETERS (IN C HES )  
Figure 5. Recommended Board Layout Pattern  
Figure 6. 622.08 Mb/s OC-12 ATM-SONET/SDH Reference Design Board  
5
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