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HFA5253

更新时间: 2024-11-20 21:53:27
品牌 Logo 应用领域
哈里斯 - HARRIS 驱动器
页数 文件大小 规格书
18页 527K
描述
800MHz, Ultra High-Speed Monolithic Pin Driver

HFA5253 数据手册

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HFA5253  
Semiconductor  
October 1998  
File Number 4003.4  
800MHz, Ultra High-Speed Monolithic Pin  
Driver  
Features  
• High Digital Data Rate . . . . . . . . . . . . . . . . . . . . . 800MHz  
• Very Fast Rise/Fall Times. . . . . . . . . . . . . . . . . . . . . 500ps  
• Wide Output Range . . . . . . . . . . . . . . . . . . . . . +8V to -3V  
• Precise 50Output Impedance  
The HFA5253 is a very high speed monolithic pin driver  
solution for high performance test systems. The device will  
switch at high data rates between two input voltage levels  
providing variable amplitude pulses. Slew Rate Control pins  
provide independent control over positive and negative slew  
rate allowing the customer to optimize the pin driver speed  
for their application. The output impedance is trimmed to  
achieve a precision 50source for impedance matching.  
Two differential ECL/TTL compatible inputs control the  
• High Impedance, Three-State Output Control  
• Slew Rate Control  
Applications  
operation of the HFA5253, one controlling the V  
/V  
HIGH LOW  
• IC Tester Pin Electronics  
• Pattern Generators  
• Pulse Generators  
switching and the other controlling the output’s high-  
impedance state. The HFA5253’s 800MHz data rate makes it  
compatible with today’s high-speed VLSI test systems and  
the +8V to -3V output swing satisfies the most stringent  
testing requirements of all common logic families.  
• Level Comparator/Translator  
The HFA5253 is manufactured in Harris’ proprietary  
complementary bipolar UHF-1 process.  
Part Number Information  
TEMP. RANGE  
PKG.  
NO.  
o
PART NUMBER  
( C)  
PACKAGE  
HFA5253CB  
0 to 50  
20 Ld PSOP  
M20.3A  
Pinout  
Block Diagram  
HFA5253 (PSOP)  
INPUT BUFFER  
TOP VIEW  
V
HIGH  
+SRC  
1
2
V
V
V
V
V
V
20  
19  
CC1  
CC1  
CC2  
CC2  
HIGH  
+SRC  
Q
Q
V
CC  
DATA  
DATA  
-
3
18 NC  
+
50Ω  
4
17 DATA  
16 DATA  
V
OUT  
5
OUT  
NC  
6
15  
NC  
HIZ  
HIZ  
+
-
V
14 HIZ  
13 HIZ  
12  
7
EE2  
EE2  
EE1  
EE1  
V
V
V
8
V
EE  
9
-SRC  
-SRC  
10  
11 V  
LOW  
V
LOW  
INPUT BUFFER  
POWER PSOP PACKAGE  
(HEAT SLUG SURFACE IS ELECTRICALLY FLOATING)  
TRUTH TABLE FOR V  
OUT  
DATA  
0
1
0
1
V
V
LOW  
HIGH  
HIZ  
HIZ  
HIZ  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Copyright © Harris Corporation 1998  
89  

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