HFA3861
Data Sheet
July 1999
File Number 4699.1
ADVANCE INFORMATION
Direct Sequence Spread Spectrum
Baseband Processor
Features
• Complete DSSS Baseband Processor
™
The Intersil HFA3861 Direct Sequence
• Processing Gain. . . . . . . . . . . . . . . . . . . . FCC Compliant
• Programmable Data Rate. . . . . . . . 1, 2, 5.5, and 11Mbps
• Ultra Small Package. . . . . . . . . . . . . . . . . . . . . 10 x 10mm
• Single Supply Operation (44MHz Max) . . . . . 2.7V to 3.6V
• Modulation Methods. . . . . . . . DBPSK, DQPSK, and CCK
• Supports Full or Half Duplex Operations
Spread Spectrum (DSSS) baseband
processor is part of the PRISM®
2.4GHz radio chipset, and contains all
the functions necessary for a full or half duplex packet
baseband transceiver.
The HFA3861 has on-board A/D’s for analog I and Q inputs
and outputs, for which the HFA3783 IF QMODEM is
recommended. Differential phase shift keying modulation
schemes DBPSK and DQPSK, with data scrambling
capability, are available along with Complementary Code
Keying to provide a variety of data rates. Built-in flexibility
allows the HFA3861 to be configured through a general
purpose control bus, for a range of applications. Both
Receive and Transmit AGC functions with 7-bit AGC control
obtain maximum performance in the analog portions of the
transceiver. The HFA3861 is housed in a thin plastic quad
flat package (TQFP) suitable for PCMCIA board
applications.
• On-Chip A/D and D/A Converters for I/Q Data (6-Bit,
22MSPS), AGC, and Adaptive Power Control (7-Bit)
• Targeted for Multipath Delay Spreads ~100ns
• Supports Short Preamble Acquisition
Applications
• Enterprise WLAN Systems
• Systems Targeting IEEE 802.11 Standard
• DSSS PCMCIA Wireless Transceiver
• Spread Spectrum WLAN RF Modems
• TDMA Packet Protocol Radios
• Part 15 Compliant Radio Links
• Portable PDA/Notebook Computer
• Wireless Digital Audio, Video, Multimedia
• PCN/Wireless PBX
Ordering Information
TEMP.
o
PART NO.
HFA3861IV
RANGE ( C)
-40 to 85
PKG. TYPE
64 Ld TQFP
PKG. NO.
Q64.10x10
HFA3861IV96
-40 to 85
Tape and Reel
Pinout
• Wireless Bridges
Simplified Block Diagram
6463 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
TEST4
TEST3
TEST2
TEST1
TEST0
GNDd
MCLK
NC
ANT-SEL
ANT-SEL
RX-RF_AGC
GNDd
1
2
3
4
5
6
7
8
ANT_SEL
V
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
DDD
RX_RF_AGC
RX_IF_DET
1
SD
SCLK
R/W
1
7
THRESH.
DETECT
AGC
CTL
CS
RX_IF_AGC
IF
GNDd
DAC
V
DDD
RX_I±
6
6
GNDa
RX_I+
RX_I-
9
I ADC
10
11
12
13
14
15
16
DEMOD
I/O
RX_Q±
Q ADC
V
V
DDD
V
DDA
REF
DATA I/O
GNDd
RX_Q+
RX_Q-
GNDa
TX_IF_AGC
RX_IF_AGC
COMPCAP1
TX_I±
6
6
I DAC
V
REF
TX_Q±
MOD
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Q DAC
TX_IF_AGC
TX_AGC_IN
7
6
TX
TX
ALC
DAC
TX
ADC
HFA 3861 BBP
44MHz MCLK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
PRISM and PRISM logo are trademarks of Intersil Corporation.
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