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HEF40175BP,652 PDF预览

HEF40175BP,652

更新时间: 2024-11-19 19:45:07
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
14页 749K
描述
HEF40175B - Quad D-type flip-flop DIP 16-Pin

HEF40175BP,652 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.47
系列:4000/14000/40000JESD-30 代码:R-PDIP-T16
JESD-609代码:e4长度:21.6 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:5000000 Hz位数:4
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:BULK PACK峰值回流温度(摄氏度):260
电源:5/15 V传播延迟(tpd):160 ns
认证状态:Not Qualified座面最大高度:4.7 mm
子类别:FF/Latches最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:5 MHzBase Number Matches:1

HEF40175BP,652 数据手册

 浏览型号HEF40175BP,652的Datasheet PDF文件第2页浏览型号HEF40175BP,652的Datasheet PDF文件第3页浏览型号HEF40175BP,652的Datasheet PDF文件第4页浏览型号HEF40175BP,652的Datasheet PDF文件第5页浏览型号HEF40175BP,652的Datasheet PDF文件第6页浏览型号HEF40175BP,652的Datasheet PDF文件第7页 
HEF40175B  
Quad D-type flip-flop  
Rev. 9 — 21 March 2016  
Product data sheet  
1. General description  
The HEF40175B is a quad edge-triggered D-type flip-flop with four data inputs (D0 to D3),  
a clock input (CP), an overriding asynchronous master reset input (MR), four buffered  
outputs (Q0 to Q3), and four complementary buffered outputs (Q0 to Q3). Information on  
D0 to D3 is transferred to Q0 to Q3 on the LOW-to-HIGH transition of CP if MR is HIGH.  
When LOW, MR resets all flip-flops (Q0 to Q3 = LOW; Q0 to Q3 = HIGH), independent of  
CP and D0 to D3.  
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS  
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.  
2. Features and benefits  
Fully static operation  
5 V, 10 V, and 15 V parametric ratings  
Standardized symmetrical output characteristics  
Specified from 40 C to +125 C  
Complies with JEDEC standard JESD 13-B  
3. Applications  
Shift registers  
Buffer/storage register  
Pattern generator  
4. Ordering information  
Table 1.  
Ordering information  
All types operate from 40 C to +125 C.  
Type number  
Package  
Name  
Description  
Version  
HEF40175BT  
SO16  
plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
SOT403-1  
HEF40175BTT  
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
 
 
 
 

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