Datasheet > HEF40175BTT-Q100

HEF40175BTT-Q100

更新时间： 2024-11-18 15:19:43

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
12页	213K
描述
Quad D-type flip-flopProduction

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HEF40175BTT-Q100 数据手册

HEF40175B-Q100

Quad D-type flip-flop

Rev. 1 — 20 October 2023

Product data sheet

1. General description

The HEF40175B-Q100 is a quad positive edge triggered D-type flip-flop with four data (Dn) inputs,

common clock (CP) and asynchronous master reset (MR) inputs, and complementary Qn and Qn

outputs. When MR is HIGH data at the D-input that meets the set-up and hold time requirements

on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.

When LOW, MR resets all flip-flops (Qn = LOW, Qn = HIGH), independent of CP and Dn. Inputs

include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of V_DD

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 3.0 V to 15.0 V

CMOS low power dissipation

High noise immunity

Fully static operation

5 V, 10 V, and 15 V parametric ratings

Standardized symmetrical output characteristics

Complies with JEDEC standard JESD 13-B

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-B exceeds 200 V

3. Applications

•

Shift registers

Buffer/storage register

Pattern generator

4. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range

-40 °C to +125 °C

Name

Description

Version

HEF40175BTT-Q100

TSSOP16 plastic thin shrink small outline package; SOT403-1

16 leads; body width 4.4 mm

12 3 4 5 6 7...12

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