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HE84G770(S)

更新时间: 2022-01-18 18:38:00
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HE84G770(S) 数据手册

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King Billion Electronics Co., Ltd  
HE84G770  
駿 億 電 子 股 份 有 限 公 司  
HE80004H SERIES  
5.ROM Map Configurations  
The chip has built-in 1M bytes internal ROM including 512K bytes program ROM and 512K bytes data  
ROM. In addition, address and data buses are provided to access External ROM. The MCU can access up  
to 4 MB Program ROM and up to 16 MB Data space through external buses. The SEG[79..72],  
SEG[71..44] pads are used as either data and address buses for external ROM or LCD segment driver  
pads depending on the mask option MO_EXMEM. When the external ROM mask option is selected, the  
MCU will retrieve the instructions and data from external ROM through the address and data buses and  
the SEG[79..44] will not be LCD segment signals.  
The bit 14 ~ 15 bit of 16-bit logical program address can be mapped to any one of 256 pages through  
mapping registers PSA1, PSA2, PSA3. As logical page 0 can not be moved and is always physical page 0,  
the PSA1 ~ PSA3 contain the physical page addresses of logical pages 1 ~ 3.  
Logical Address  
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
Page Addr. A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0  
A[15..14] Logical Page Physical Page Address Physical Address  
00  
01  
10  
11  
0
1
2
3
0
00 A[13..0]  
PSA1  
PSA2  
PSA3  
PSA1+A[13..0]  
PSA2+A[13..0]  
PSA3+A[13..0]  
Register Address Type  
Bits Definition  
Reset  
0x01  
0x02  
0x03  
PSA1  
PSA2  
PSA3  
0x2C  
0x2D  
0x2E  
R/W  
R/W  
R/W  
A21  
A21  
A21  
A20  
A20  
A20  
A19  
A19  
A19  
A18  
A17  
A17  
A17  
A16  
A16  
A16  
A15  
A15  
A15  
A14  
A14  
A14  
A18  
A18  
October 31, 2003  
7
Version:V1.1  
This specification is subject to change without notice. Please contact sales person for the latest version before use.  

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