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HD74LV1GT08A-EL PDF预览

HD74LV1GT08A-EL

更新时间: 2024-02-20 22:17:22
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瑞萨 - RENESAS 转换器电平转换器逻辑集成电路光电二极管
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HD74LV1GT08A-EL 数据手册

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HD74LV1GT08A  
2–input AND Gate / CMOS Logic Level Shifter  
REJ03D0118–0800Z  
(Previous ADE-205-328F (Z))  
Rev.8.00  
Sep.24.2003  
Description  
The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With  
CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of  
three stages construction with buffer provides wide noise margin and stable output. The input protection  
circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a  
logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V  
CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is  
suitable for the battery powered products (e.g., notebook computers), and the low power consumption  
extends the battery life.  
Features  
The basic gate function is lined up as Renesas uni logic series.  
Supplied on emboss taping for high-speed automatic mounting.  
TTL compatible input level.  
Supply voltage range : 3.0 to 5.5 V  
Operating temperature range : –40 to +85°C  
Logic-level translate function  
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)  
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)  
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)  
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)  
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)  
All the logical input has hysteresis voltage for the slow transition.  
Ordering Information  
Part Name  
Package Type  
Package Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
HD74LV1GT08ACME CMPAK-5 pin  
HD74LV1GT08AVSE VSON-5 pin  
CMPAK-5V  
CMPAK-5V(O)  
TNP-5DV  
CM  
VS  
E (3,000 pcs/reel)  
Rev.8.00, Sep.24.2003, page 1 of 10  

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