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HD74HC353 PDF预览

HD74HC353

更新时间: 2024-12-01 05:35:15
品牌 Logo 应用领域
瑞萨 - RENESAS 复用器
页数 文件大小 规格书
7页 182K
描述
Dual 4-to-1-line Data Selectors/Multiplexers

HD74HC353 数据手册

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HD74HC353  
Dual 4-to-1-line Data Selectors/Multiplexers  
REJ03D0612–0200  
(Previous ADE-205-491)  
Rev.2.00  
Jan 31, 2006  
Description  
Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to  
the AND-OR-invert gates. Separate strobe inputs (G) are provided for each of the two four-line sections.  
The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the  
common output disabled (at a high-impedance state) the low-impedance of the single enable output will drive the bus  
line to a high or low logic level. Each output has its own strobe (G). The output is disabled when its strobe is high.  
Features  
High Speed Operation: tpd (Data to Y) = 13 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA ma
Ordering Information  
P
e  
viation  
Taping Abbreviation  
(Quantity)  
Part Name  
HD74HC353P  
HD74HC353RPEL SOP-16 pin (J
Package Type  
DILP-16 pin  
RP  
EL (2,500 pcs/reel)  
Note: Please consult the sales availability.  
Function Table  
Select Input  
Data Inputs  
C1  
Output Control  
Output  
B
X
L
A
X
L
X
L
C2  
X
X
X
X
X
L
C3  
X
X
X
X
X
X
X
L
G
H
L
L
L
L
L
L
L
L
Y
Z
H
L
X
X
X
L
L
L
H
X
X
X
X
X
X
L
H
H
L
H
L
L
H
X
X
X
X
H
H
H
H
H
L
L
H
X
X
H
H
H
L
H
Select inputs A and B are common to both sections  
Rev.2.00 Jan 31, 2006 page 1 of 6  

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