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HD66740WTB0 PDF预览

HD66740WTB0

更新时间: 2024-11-17 11:04:31
品牌 Logo 应用领域
日立 - HITACHI 驱动器显示控制器微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
95页 810K
描述
112 x 80-dot Graphics LCD Controller/Driver

HD66740WTB0 数据手册

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HD66740  
HD66740  
(112 x 80-dot Graphics LCD Controller/Driver)  
Rev 1.0  
August, 2001  
Description  
The HD66740, 112-by-80 dot-matrix graphics LCD controller and driver LSI, displays graphics such as  
text, kanji and pictograms. It can be configured to drive a dot-matrix liquid crystal under the control of the  
microprocessor connected via the clock-synchronized serial or 4/8-bit bus. The HD66740 has a smooth  
vertical scroll display and a double-height display for the remaining bit map areas. It fixed-displays a part  
of the graphics icons so that the user can easily see a variety of information.  
The HD66740 has various functions to reduce the power consumption of an LCD system such as low-  
voltage operation of 1.8 V min., a booster to generate maximum five-times LCD drive voltage from the  
supplied voltage, and voltage-followers to decrease the direct current flow in the LCD drive bleeder-  
resistors. Combining these hardware functions with software functions such as standby and sleep modes  
allows fine power control. The HD66740 is suitable for any portable battery-driven product requiring  
long-term driving capabilities such as cellular phones, pagers, or electronic wallets.  
Features  
Control and drive of a graphics LCD  
112 x 80-dot display  
Fixed display of graphics icons (pictograms)  
Low-power operation support:  
Vcc = 1.8 to 3.6 V (low voltage)  
VLCD = 4.5 to 15.0 V (liquid crystal drive voltage)  
Triple, quadruple, or five-times booster for liquid crystal drive voltage  
64-step contrast adjuster and voltage followers to decrease direct current flow in the LCD drive  
bleeder-resistors  
Power-save functions such as the standby mode and sleep mode supported  
Programmable drive duty ratios and bias values displayed on LCD  
High-speed clock-synchronized serial interface (serial transfer rate: 5 MHz max.)  
I2C bus interface  
High-speed 4-/8-bit bus interface capability  
112-segment × 80-common liquid crystal display driver  
1,120-byte (112 × 80 dots) character generator RAM  
1

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Datasheet|ADE-207-347|JAN.31.03|829K