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HCPL-250L PDF预览

HCPL-250L

更新时间: 2024-11-21 00:01:35
品牌 Logo 应用领域
安捷伦 - AGILENT 光电
页数 文件大小 规格书
12页 93K
描述
LVTTL/LVCMOS Compatible 3.3 V Optocouplers (1 Mb/s)

HCPL-250L 数据手册

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AgilentHCPL-250L/050L/253L/053L  
LVTTL/LVCMOSCompatible3.3V  
Optocouplers(1Mb/s)  
Data Sheet  
Features  
Low power consumption  
High speed: 1 Mb/s  
LVTTL/LVCMOScompatible  
Available in 8-pin DIP, SO-8  
Open collector output  
These optocouplers are available  
in an 8-pin DIP and in an industry  
standard SO-8 package. The  
following is a cross reference  
table listing the 8-pin DIP part  
number and the electrically  
Description  
These diode-transistor optocouplers  
use an insulating layer between a  
LED and an integrated  
Guaranteed performance from  
temperature:0˚Cto+70˚C  
photodetector to provide electrical  
insulation between input and  
output. Separate connections for  
the photodiode bias and output-  
transistor collector increase the  
speed up to a hundred times that of  
a conventional phototransistor  
coupler by reducing the base-  
collector capacitance.  
Safetyapproval,UL,CSA,IEC/EN/DIN  
EN60747-5-2  
equivalent SO-8 part number.  
The SO-8 does not require  
Applications  
"through holes" in a PCB. This  
package occupies approximately  
one-third the footprint area of the  
High voltage insulation  
Video signal isolation  
Power translator isolation in motor  
drives  
Line receivers  
Functional Diagram  
Feedback element in switched mode  
power supplies  
HCPL–250L/HCPL–050L  
HCPL–253L/HCPL–053L  
High speed logic ground isolation –  
LVTTL/LVCMOS  
1
2
3
4
8
7
6
5
V
V
V
8
7
6
5
ANODE  
CATHODE  
CATHODE  
ANODE  
NC  
ANODE  
CATHODE  
NC  
1
2
3
4
V
V
V
1
1
2
2
CC  
O1  
O2  
CC  
B
Replaces pulse transformers  
Replaces slow phototransistor  
isolators  
O
Analog signal ground isolation  
GND  
GND  
TRUTH TABLE  
(POSITIVE LOGIC)  
LED  
V
O
ON  
OFF  
LOW  
HIGH  
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent  
damage and/or degradation which may be induced by ESD.  

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