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HCF4056B_02 PDF预览

HCF4056B_02

更新时间: 2024-11-23 04:56:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器驱动器
页数 文件大小 规格书
10页 262K
描述
BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION

HCF4056B_02 数据手册

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HCF4056B  
BCD TO 7 SEGMENT DECODER /DRIVER  
WITH STROBED LATCH FUNCTION  
QUIESCENT CURRENT SPECIF. UP TO 20V  
OPERATION OF LIQUID CRYSTALS WITH  
CMOS CIRCUITS PROVIDES ULTRA LOW  
POWER DISPLAY.  
EQUIVALENT AC OUTPUT DRIVE FOR  
LIQUID CRYSTAL DISPLAYS - NO  
EXTERNAL CAPACITOR REQUIRED  
VOLTAGE DOUBLING ACROSS DISPLAY  
DIP  
SOP  
[(V - V ) = 18V] RESULTS IN EFFECTIVE  
DD  
EE  
36V (p-p) DRIVE ACROSS SELECTED  
DISPLAY SEGMENTS  
ORDER CODES  
PACKAGE  
TUBE  
T & R  
LOW OR HIGH OUTPUT LEVEL DC DRIVE  
FOR OTHER TYPES OF DISPLAYS  
ONE CHIP LOGIC LEVEL CONVERSION  
FOR DIFFERENT INPUT AND OUTPUT  
LEVEL SWINGS  
DIP  
HCF4056BEY  
HCF4056BM1  
SOP  
HCF4056M013TR  
FULL DECODING OF ALL INPUT  
COMBINATIONS : "0 - 9, L, H, P, A" AND  
BLANK POSITIONS  
HCF4056B is a single digit BCD to 7 segment  
decoder driver circuit that provides a level shifting  
function on the chip. This feature permits the BCD  
INPUT LEAKAGE CURRENT  
input-signal swings (V  
to V ) to be the same  
DD  
SS  
I = 100nA (MAX) AT V = 18V T = 25°C  
I
DD  
A
as or different from the 7-segment output signal  
100% TESTED FOR QUIESCENT CURRENT  
swings (V to V ). For example, the BCD  
DD  
EE  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B "STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
input-signal swings (V to V ) may be as low as  
DD SS  
0 to -3V, whereas the output-display drive signal  
swing (V to V ) may be from 0 to -5V. If V to  
DD  
EE  
DD  
V
exceeds 15V, V  
to V should be at least  
EE  
DD SS  
4V. The 7-segment outputs are controlled by the  
DISPLAY-FREQUENCY (DF) input, which causes  
the selected segment outputs to be low, high, or a  
square wave output (for liquid crystal displays).  
DESCRIPTION  
HCF4056B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
PIN CONNECTION  
September 2002  
1/10  

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