Datasheet > HC4060M

HC4060M

更新时间： 2024-11-24 23:14:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		振荡器计数器
页数	文件大小	规格书
12页	259K
描述
14 STAGE BINARY COUNTER/OSCILLATOR

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中文翻译

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数据手册

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HC4060M 数据手册

M54HC4060

M74HC4060

14 STAGE BINARY COUNTER/OSCILLATOR

HIGH SPEED

f_MAX= 58 MHz (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

HIGH NOISE IMMUNITY

V_NIH= V_NIL= 28 % V_CC(MIN.)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

V_CC(OPR) = 2 V TO 6 V

PIN AND FUNCTION COMPATIBLE

WITH 4060B

ORDER CODES :

M54HC4060F1R

M74HC4060B1R

M74HC4060M1R

M74HC4060C1R

PIN CONNECTIONS (top view)

DESCRIPTION

The M54/74HC4060 is a high speed CMOS 14-

STAGE BINARY COUNTER/OSCILLATOR fabri-

cated in silicon gate C²MOS technology. It has the

same high speed performance of LSTTL combined

with true CMOS low power consumption. It operates

ten times faster than metal-gate C²MOS IC (4060B)

with the same power dissipation.

The oscillator configuration allows design of either

RC or crystal oscillator circuits. A high level on the

CLEAR accomplishes the reset function, i.e. all

counter outputs are made low and the oscillator is

disabled.

A negative transition on the clock input increments

the counter. Ten kinds of divided output are pro-

vided ; 4 to 10 and 12 to 14 stage inclusive. The

maximum division available at Q12 is 1/16384 f os-

cillator.

NC =

No Internal

Connection

The Ø₁input and the CLEAR input are equipped

with protection circuits against static discharge and

transient excess voltage.

March 1993

1/12

12 3 4 5 6 7...12

中文翻译

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