Datasheet > GS81302QT38AGD-400

GS81302QT38AGD-400

更新时间： 2022-02-26 10:18:17

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
25页	426K
描述
144Mb SigmaQuad-IITM Burst of 2 SRAM

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数据手册

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GS81302QT38AGD-400 数据手册

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Preliminary

GS81302QT20/38AGD-500/450/400

Separate I/O SigmaQuad-II B2 SigmaQuad-II SRAM Read Truth Table

Output Next State

K 

(t )

)

n+2

Hi-Z

n+2½

Deselect

Read

Hi-Z

Notes:

1. X = Don’t Care, 1 = High, 0 = Low, V = Valid.

2. R is evaluated on the rising edge of K.

3. Q0 and Q1 are the first and second data output transfers in a read.

Separate I/O SigmaQuad-II B2 SigmaQuad-II SRAM Write Truth Table

BWn

Input Next State

K 

K K 

)

(t )

)

(t_n), (t_{n + ½}

)

(t )

)

n + ½

Write Byte Dx0, Write Byte Dx1

Write Byte Dx0, Write Abort Byte Dx1

Write Abort Byte Dx0, Write Byte Dx1

Write Abort Byte Dx0, Write Abort Byte Dx1

Deselect

Notes:

1. X = Don’t Care, H = High, L = Low, V = Valid.

2. W is evaluated on the rising edge of K.

3. D0 and D1 are the first and second data input transfers in a write.

4. BWn represents any of the Byte Write Enable inputs (BW0, BW1, etc.).

Rev: 1.00a 5/2017

7/25

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

1...4 5 678 9 10...25

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